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[3/3] ARM 64 bit atomic operations

Message ID 20110701155710.GD5242@davesworkthinkpad
State Superseded
Headers show

Commit Message

Dr. David Alan Gilbert July 1, 2011, 3:57 p.m. UTC
As per pr/48126 Michael Edwards spotted that in the case where
the compare fails in the cmpxchg, the barrier at the end wasn't taken
theoretically allowing a following load to float up above the load
value compared.

Comments

Ramana Radhakrishnan July 12, 2011, 3 p.m. UTC | #1
On 1 July 2011 16:57, Dr. David Alan Gilbert <david.gilbert@linaro.org> wrote:
>
> As per pr/48126 Michael Edwards spotted that in the case where
> the compare fails in the cmpxchg, the barrier at the end wasn't taken
> theoretically allowing a following load to float up above the load
> value compared.

Please resubmit with a proper changelog entry. Can you add a comment
in the code to explain that this is to prevent speculative loads
before the barrier ?

cheers
Ramana

>
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 057f9ba..39057d2 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -23531,8 +23626,8 @@ arm_output_sync_loop (emit_f emit,
>        }
>     }
>
> -  arm_process_output_memory_barrier (emit, NULL);
>   arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
> +  arm_process_output_memory_barrier (emit, NULL);
>  }
>
>  static rtx
>
diff mbox

Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 057f9ba..39057d2 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -23531,8 +23626,8 @@  arm_output_sync_loop (emit_f emit,
 	}
     }
 
-  arm_process_output_memory_barrier (emit, NULL);
   arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
+  arm_process_output_memory_barrier (emit, NULL);
 }
 
 static rtx