@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Device Tree Include file for Freescale Layerscape-1046A family SoC.
+ * Device Tree Include file for NXP Layerscape-1046A family SoC.
*
+ * Copyright 2020 NXP
* Copyright (C) 2016, Freescale Semiconductor
*
* Mingkai Hu <mingkai.hu at nxp.com>
@@ -241,7 +242,7 @@
dr_mode = "host";
};
- pcie at 3400000 {
+ pcie1: pcie at 3400000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */
0x00 0x03480000 0x0 0x40000 /* lut registers */
@@ -257,7 +258,7 @@
0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie at 3500000 {
+ pcie2: pcie at 3500000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
0x00 0x03580000 0x0 0x40000 /* lut registers */
@@ -274,7 +275,7 @@
0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
- pcie at 3600000 {
+ pcie3: pcie at 3600000 {
compatible = "fsl,ls-pcie", "snps,dw-pcie";
reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
0x00 0x03680000 0x0 0x40000 /* lut registers */
add label to pcie nodes in dts Signed-off-by: Wasim Khan <wasim.khan at nxp.com> --- arch/arm/dts/fsl-ls1046a.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)