| Message ID | 20200602120423.6285-3-m.szyprowski@samsung.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | ARM: arbitrary virtual-physical mappings for RPi4 XHCI support | expand |
On Tue, Jun 02, 2020 at 02:04:20PM +0200, Marek Szyprowski wrote: > Provide function for setting arbitrary virtual-physical MMU mapping for the given region. > > Signed-off-by: Marek Szyprowski <m.szyprowski at samsung.com> > Change-Id: If10b06cc6edbdff311a1b6302112e8cd0bb5313f > --- > arch/arm/include/asm/mmu.h | 8 ++++++++ > arch/arm/include/asm/system.h | 11 +++++++++++ > arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------ > 3 files changed, 37 insertions(+), 6 deletions(-) > create mode 100644 arch/arm/include/asm/mmu.h > > diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h > new file mode 100644 > index 00000000000..fe3d7930790 > --- /dev/null > +++ b/arch/arm/include/asm/mmu.h > @@ -0,0 +1,8 @@ > +#ifndef __ASM_ARM_MMU_H > +#define __ASM_ARM_MMU_H > + > +#ifdef CONFIG_ADDR_MAP > +extern void init_addr_map(void); > +#endif > + > +#endif No SPDX tag and just like Linux we don't need/want 'extern' (yes, there are examples doing this today still). We also shouldn't wrap this in an #if. > diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h > index 1e3f574403a..6b6095d78e2 100644 > --- a/arch/arm/include/asm/system.h > +++ b/arch/arm/include/asm/system.h > @@ -581,6 +581,17 @@ s32 psci_features(u32 function_id, u32 psci_fid); > */ > void save_boot_params_ret(void); > > +/** > + * Change the virt/phys mapping and cache settings for a region. > + * > + * \param virt virtual start address of memory region to change > + * \param phys physical address for the memory region to set > + * \param size size of memory region to change > + * \param option dcache option to select > + */ > +void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys, > + size_t size, enum dcache_option option); > + Is '\param' valid rST? I see that follows some other examples in the file, would you mind doing a follow up to convert those to @param instead. If you don't have time, at least please make these @param. Functionally I believe everything else is fine however, thanks!
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h new file mode 100644 index 00000000000..fe3d7930790 --- /dev/null +++ b/arch/arm/include/asm/mmu.h @@ -0,0 +1,8 @@ +#ifndef __ASM_ARM_MMU_H +#define __ASM_ARM_MMU_H + +#ifdef CONFIG_ADDR_MAP +extern void init_addr_map(void); +#endif + +#endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 1e3f574403a..6b6095d78e2 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -581,6 +581,17 @@ s32 psci_features(u32 function_id, u32 psci_fid); */ void save_boot_params_ret(void); +/** + * Change the virt/phys mapping and cache settings for a region. + * + * \param virt virtual start address of memory region to change + * \param phys physical address for the memory region to set + * \param size size of memory region to change + * \param option dcache option to select + */ +void mmu_set_region_dcache_behaviour_phys(phys_addr_t virt, phys_addr_t phys, + size_t size, enum dcache_option option); + /** * Change the cache settings for a region. * diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index 1da2e92fe24..39717610d41 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -25,7 +25,8 @@ __weak void arm_init_domains(void) { } -void set_section_dcache(int section, enum dcache_option option) +static void set_section_phys(int section, phys_addr_t phys, + enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -37,7 +38,7 @@ void set_section_dcache(int section, enum dcache_option option) #endif /* Add the page offset */ - value |= ((u32)section << MMU_SECTION_SHIFT); + value |= phys; /* Add caching bits */ value |= option; @@ -46,13 +47,18 @@ void set_section_dcache(int section, enum dcache_option option) page_table[section] = value; } +void set_section_dcache(int section, enum dcache_option option) +{ + set_section_phys(section, (u32)section << MMU_SECTION_SHIFT, option); +} + __weak void mmu_page_table_flush(unsigned long start, unsigned long stop) { debug("%s: Warning: not implemented\n", __func__); } -void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, - enum dcache_option option) +void mmu_set_region_dcache_behaviour_phys(phys_addr_t start, phys_addr_t phys, + size_t size, enum dcache_option option) { #ifdef CONFIG_ARMV7_LPAE u64 *page_table = (u64 *)gd->arch.tlb_addr; @@ -74,8 +80,8 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, debug("%s: start=%pa, size=%zu, option=0x%x\n", __func__, &start, size, option); #endif - for (upto = start; upto < end; upto++) - set_section_dcache(upto, option); + for (upto = start; upto < end; upto++, phys += MMU_SECTION_SIZE) + set_section_phys(upto, phys, option); /* * Make sure range is cache line aligned @@ -90,6 +96,12 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, mmu_page_table_flush(startpt, stoppt); } +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size, + enum dcache_option option) +{ + mmu_set_region_dcache_behaviour_phys(start, start, size, option); +} + __weak void dram_bank_mmu_setup(int bank) { bd_t *bd = gd->bd;
Provide function for setting arbitrary virtual-physical MMU mapping for the given region. Signed-off-by: Marek Szyprowski <m.szyprowski at samsung.com> Change-Id: If10b06cc6edbdff311a1b6302112e8cd0bb5313f --- arch/arm/include/asm/mmu.h | 8 ++++++++ arch/arm/include/asm/system.h | 11 +++++++++++ arch/arm/lib/cache-cp15.c | 24 ++++++++++++++++++------ 3 files changed, 37 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/mmu.h