diff mbox series

[v3,2/6] sifive: fu540: Add Booting from SPI

Message ID 20200604203949.550290-3-jagan@amarulasolutions.com
State Superseded
Headers show
Series riscv: sifive/fu540: SPI boot | expand

Commit Message

Jagan Teki June 4, 2020, 8:39 p.m. UTC
Add booting from SPI for SiFive Unleashed board.

Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
Changes for v3:
- updated based on master

 arch/riscv/cpu/fu540/Kconfig                  |  2 +
 .../dts/hifive-unleashed-a00-u-boot.dtsi      | 12 ++++++
 configs/sifive_fu540_defconfig                |  4 ++
 doc/board/sifive/fu540.rst                    | 41 +++++++++++++++++++
 4 files changed, 59 insertions(+)

Comments

Bin Meng June 22, 2020, 1:53 p.m. UTC | #1
On Fri, Jun 5, 2020 at 4:40 AM Jagan Teki <jagan at amarulasolutions.com> wrote:
>
> Add booting from SPI for SiFive Unleashed board.
>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> ---
> Changes for v3:
> - updated based on master
>
>  arch/riscv/cpu/fu540/Kconfig                  |  2 +
>  .../dts/hifive-unleashed-a00-u-boot.dtsi      | 12 ++++++
>  configs/sifive_fu540_defconfig                |  4 ++
>  doc/board/sifive/fu540.rst                    | 41 +++++++++++++++++++
>  4 files changed, 59 insertions(+)
>
> diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig
> index e9302e87c0..7a813a9ac8 100644
> --- a/arch/riscv/cpu/fu540/Kconfig
> +++ b/arch/riscv/cpu/fu540/Kconfig
> @@ -5,6 +5,8 @@
>  config SIFIVE_FU540
>         bool
>         select ARCH_EARLY_INIT_R
> +       imply BOARD
> +       imply BOARD_FU540

These 2 are not needed in v3.

>         imply CPU
>         imply CPU_RISCV
>         imply RISCV_TIMER
> diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> index 303806454b..4b2b242deb 100644
> --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> @@ -12,6 +12,10 @@
>                 spi2 = &qspi2;
>         };
>
> +       config {
> +               u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */
> +       };
> +
>         hfclk {
>                 u-boot,dm-spl;
>         };
> @@ -22,6 +26,14 @@
>
>  };
>
> +&qspi0 {
> +       u-boot,dm-spl;
> +
> +       flash at 0 {
> +               u-boot,dm-spl;
> +       };
> +};
> +
>  &qspi2 {
>         mmc at 0 {
>                 u-boot,dm-spl;

Other than above,
Reviewed-by: Bin Meng <bin.meng at windriver.com>
Tested-by: Bin Meng <bin.meng at windriver.com>
Rick Chen June 29, 2020, 6:29 a.m. UTC | #2
Hi Jagan

> From: Bin Meng [mailto:bmeng.cn at gmail.com]
> Sent: Monday, June 22, 2020 9:53 PM
> To: Jagan Teki
> Cc: Rick Jian-Zhi Chen(???); Atish Patra; Palmer Dabbelt; Paul Walmsley; Anup Patel; Sagar Kadam; U-Boot Mailing List; linux-amarula
> Subject: Re: [PATCH v3 2/6] sifive: fu540: Add Booting from SPI
>
> On Fri, Jun 5, 2020 at 4:40 AM Jagan Teki <jagan at amarulasolutions.com> wrote:
> >
> > Add booting from SPI for SiFive Unleashed board.
> >
> > Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> > ---
> > Changes for v3:
> > - updated based on master
> >
> >  arch/riscv/cpu/fu540/Kconfig                  |  2 +
> >  .../dts/hifive-unleashed-a00-u-boot.dtsi      | 12 ++++++
> >  configs/sifive_fu540_defconfig                |  4 ++
> >  doc/board/sifive/fu540.rst                    | 41 +++++++++++++++++++
> >  4 files changed, 59 insertions(+)
> >
> > diff --git a/arch/riscv/cpu/fu540/Kconfig
> > b/arch/riscv/cpu/fu540/Kconfig index e9302e87c0..7a813a9ac8 100644
> > --- a/arch/riscv/cpu/fu540/Kconfig
> > +++ b/arch/riscv/cpu/fu540/Kconfig
> > @@ -5,6 +5,8 @@
> >  config SIFIVE_FU540
> >         bool
> >         select ARCH_EARLY_INIT_R
> > +       imply BOARD
> > +       imply BOARD_FU540
>
> These 2 are not needed in v3.

How is your opinion here ?

>
> >         imply CPU
> >         imply CPU_RISCV
> >         imply RISCV_TIMER
> > diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > index 303806454b..4b2b242deb 100644
> > --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
> > @@ -12,6 +12,10 @@
> >                 spi2 = &qspi2;
> >         };
> >
> > +       config {
> > +               u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */
> > +       };
> > +
> >         hfclk {
> >                 u-boot,dm-spl;
> >         };
> > @@ -22,6 +26,14 @@
> >
> >  };
> >
> > +&qspi0 {
> > +       u-boot,dm-spl;
> > +
> > +       flash at 0 {
> > +               u-boot,dm-spl;
> > +       };
> > +};
> > +
> >  &qspi2 {
> >         mmc at 0 {
> >                 u-boot,dm-spl;
>
> Other than above,
> Reviewed-by: Bin Meng <bin.meng at windriver.com>
> Tested-by: Bin Meng <bin.meng at windriver.com>
diff mbox series

Patch

diff --git a/arch/riscv/cpu/fu540/Kconfig b/arch/riscv/cpu/fu540/Kconfig
index e9302e87c0..7a813a9ac8 100644
--- a/arch/riscv/cpu/fu540/Kconfig
+++ b/arch/riscv/cpu/fu540/Kconfig
@@ -5,6 +5,8 @@ 
 config SIFIVE_FU540
 	bool
 	select ARCH_EARLY_INIT_R
+	imply BOARD
+	imply BOARD_FU540
 	imply CPU
 	imply CPU_RISCV
 	imply RISCV_TIMER
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
index 303806454b..4b2b242deb 100644
--- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -12,6 +12,10 @@ 
 		spi2 = &qspi2;
 	};
 
+	config {
+		u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */
+	};
+
 	hfclk {
 		u-boot,dm-spl;
 	};
@@ -22,6 +26,14 @@ 
 
 };
 
+&qspi0 {
+	u-boot,dm-spl;
+
+	flash at 0 {
+		u-boot,dm-spl;
+	};
+};
+
 &qspi2 {
 	mmc at 0 {
 		u-boot,dm-spl;
diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
index 8d412f8d6a..551d4b04a5 100644
--- a/configs/sifive_fu540_defconfig
+++ b/configs/sifive_fu540_defconfig
@@ -2,9 +2,11 @@  CONFIG_RISCV=y
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x3000
 CONFIG_ENV_SIZE=0x20000
+CONFIG_SPL_DM_SPI=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_TARGET_SIFIVE_FU540=y
 CONFIG_ARCH_RV64I=y
@@ -15,9 +17,11 @@  CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_SPL_CLK=y
 CONFIG_DM_MTD=y
diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst
index f7c2c9f5bd..7a4b208288 100644
--- a/doc/board/sifive/fu540.rst
+++ b/doc/board/sifive/fu540.rst
@@ -533,3 +533,44 @@  Sample boot log from HiFive Unleashed board
 	type:   0fc63daf-8483-4772-8e79-3d69d8477de4
 	type:   linux
 	guid:   9faa81b6-39b1-4418-af5e-89c48f29c20d
+
+Booting from SPI
+----------------
+
+Use Building steps from "Booting from MMC using U-Boot SPL" section.
+
+Partition the SPI in Linux via mtdblock. (Require to boot the board in
+SD boot mode by enabling MTD block in Linux)
+
+Use prebuilt image from here [1], which support to partition the SPI flash.
+
+.. code-block:: none
+
+  # sgdisk --clear \
+  > --set-alignment=2 \
+  > --new=1:40:2087 --change-name=1:loader1 --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
+  > --new=2:2088:10279 --change-name=2:loader2 --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
+  > --new=3:10536:65494 --change-name=3:rootfs --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
+  > /dev/mtdblock0
+
+Program the SPI (Require to boot the board in SD boot mode)
+
+Execute below steps on U-Boot proper,
+
+.. code-block:: none
+
+  tftpboot $kernel_addr_r u-boot-spl.bin
+  sf erase 0x5000 $filesize
+  sf write $kernel_addr_r 0x5000 $filesize
+
+  tftpboot $kernel_addr_r u-boot.itb
+  sf erase 0x105000 $filesize
+  sf write $kernel_addr_r 0x105000 $filesize
+
+Power off the board
+
+Change DIP switches MSEL[3:0] are set to 0110
+
+Power up the board.
+
+[1] https://github.com/amarula/bsp-sifive