[PATCHv3,15/15] configs: P2020RDB: Enable DM_ETH config

From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>

Enable the DM_ETH and DM_MDIO config.

On P2020RDB, the eTSEC1 is connecting with a switch VSC7385,
so also enable the fixed PHY support.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
---
V3:
 - Rebase the patch, no change intended.

 configs/P2020RDB-PC_36BIT_NAND_defconfig     | 3 +++
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 3 +++
 configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++
 configs/P2020RDB-PC_36BIT_defconfig          | 3 +++
 configs/P2020RDB-PC_NAND_defconfig           | 3 +++
 configs/P2020RDB-PC_SDCARD_defconfig         | 3 +++
 configs/P2020RDB-PC_SPIFLASH_defconfig       | 3 +++
 configs/P2020RDB-PC_defconfig                | 3 +++
 8 files changed, 24 insertions(+)

On Fri, 12 Jun 2020 at 18:23, Zhiqiang Hou <Zhiqiang.Hou at nxp.com> wrote:
>
> From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
>
> Enable the DM_ETH and DM_MDIO config.
>
> On P2020RDB, the eTSEC1 is connecting with a switch VSC7385,
> so also enable the fixed PHY support.
>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> ---

Reviewed-by: Vladimir Oltean <vladimir.oltean at nxp.com>

> V3:
>  - Rebase the patch, no change intended.
>
>  configs/P2020RDB-PC_36BIT_NAND_defconfig     | 3 +++
>  configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 3 +++
>  configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++
>  configs/P2020RDB-PC_36BIT_defconfig          | 3 +++
>  configs/P2020RDB-PC_NAND_defconfig           | 3 +++
>  configs/P2020RDB-PC_SDCARD_defconfig         | 3 +++
>  configs/P2020RDB-PC_SPIFLASH_defconfig       | 3 +++
>  configs/P2020RDB-PC_defconfig                | 3 +++
>  8 files changed, 24 insertions(+)
>
> diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> index 3e6ea64ee3..4cd689f55d 100644
> --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> @@ -66,6 +66,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -77,8 +78,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> index 187cbee0d6..f46463a297 100644
> --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> index 88c9224001..73d1be1013 100644
> --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> @@ -63,6 +63,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -74,8 +75,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
> index 88e24c30ba..21a0e85f98 100644
> --- a/configs/P2020RDB-PC_36BIT_defconfig
> +++ b/configs/P2020RDB-PC_36BIT_defconfig
> @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -61,8 +62,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
> index dda34dd43e..800c728ed3 100644
> --- a/configs/P2020RDB-PC_NAND_defconfig
> +++ b/configs/P2020RDB-PC_NAND_defconfig
> @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -76,8 +77,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
> index c2b6ad5f32..81cbac2fe8 100644
> --- a/configs/P2020RDB-PC_SDCARD_defconfig
> +++ b/configs/P2020RDB-PC_SDCARD_defconfig
> @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
> index 3ec208ee00..89308a503b 100644
> --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
> +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
> @@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -73,8 +74,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
> index 0f0a6ad810..66fc3b0a14 100644
> --- a/configs/P2020RDB-PC_defconfig
> +++ b/configs/P2020RDB-PC_defconfig
> @@ -49,6 +49,7 @@ CONFIG_SPI_FLASH=y
>  CONFIG_SF_DEFAULT_MODE=0
>  CONFIG_SF_DEFAULT_SPEED=10000000
>  CONFIG_SPI_FLASH_SPANSION=y
> +CONFIG_PHY_FIXED=y
>  CONFIG_PHY_ATHEROS=y
>  CONFIG_PHY_BROADCOM=y
>  CONFIG_PHY_DAVICOM=y
> @@ -60,8 +61,10 @@ CONFIG_PHY_SMSC=y
>  CONFIG_PHY_VITESSE=y
>  CONFIG_PHY_GIGE=y
>  CONFIG_E1000=y
> +CONFIG_DM_ETH=y
>  CONFIG_MII=y
>  CONFIG_TSEC_ENET=y
> +CONFIG_DM_MDIO=y
>  CONFIG_DM_PCI=y
>  CONFIG_DM_PCI_COMPAT=y
>  CONFIG_PCIE_FSL=y
> --
> 2.25.1
>

Hi Vladimir,

Thanks a lot for your review!

Regards,
Zhiqiang

> -----Original Message-----
> From: Vladimir Oltean <olteanv at gmail.com>
> Sent: 2020?6?13? 4:17
> To: Z.q. Hou <zhiqiang.hou at nxp.com>
> Cc: u-boot <u-boot at lists.denx.de>; Priyanka Jain <priyanka.jain at nxp.com>;
> Bin Meng <bmeng.cn at gmail.com>
> Subject: Re: [PATCHv3 15/15] configs: P2020RDB: Enable DM_ETH config
> 
> On Fri, 12 Jun 2020 at 18:23, Zhiqiang Hou <Zhiqiang.Hou at nxp.com> wrote:
> >
> > From: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> >
> > Enable the DM_ETH and DM_MDIO config.
> >
> > On P2020RDB, the eTSEC1 is connecting with a switch VSC7385, so also
> > enable the fixed PHY support.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> > ---
> 
> Reviewed-by: Vladimir Oltean <vladimir.oltean at nxp.com>
> 
> > V3:
> >  - Rebase the patch, no change intended.
> >
> >  configs/P2020RDB-PC_36BIT_NAND_defconfig     | 3 +++
> >  configs/P2020RDB-PC_36BIT_SDCARD_defconfig   | 3 +++
> >  configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++
> >  configs/P2020RDB-PC_36BIT_defconfig          | 3 +++
> >  configs/P2020RDB-PC_NAND_defconfig           | 3 +++
> >  configs/P2020RDB-PC_SDCARD_defconfig         | 3 +++
> >  configs/P2020RDB-PC_SPIFLASH_defconfig       | 3 +++
> >  configs/P2020RDB-PC_defconfig                | 3 +++
> >  8 files changed, 24 insertions(+)
> >
> > diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > index 3e6ea64ee3..4cd689f55d 100644
> > --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
> > @@ -66,6 +66,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -77,8 +78,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > index 187cbee0d6..f46463a297 100644
> > --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
> > @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > index 88c9224001..73d1be1013 100644
> > --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
> > @@ -63,6 +63,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -74,8 +75,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_36BIT_defconfig
> > b/configs/P2020RDB-PC_36BIT_defconfig
> > index 88e24c30ba..21a0e85f98 100644
> > --- a/configs/P2020RDB-PC_36BIT_defconfig
> > +++ b/configs/P2020RDB-PC_36BIT_defconfig
> > @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -61,8 +62,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_NAND_defconfig
> > b/configs/P2020RDB-PC_NAND_defconfig
> > index dda34dd43e..800c728ed3 100644
> > --- a/configs/P2020RDB-PC_NAND_defconfig
> > +++ b/configs/P2020RDB-PC_NAND_defconfig
> > @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -76,8 +77,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_SDCARD_defconfig
> > b/configs/P2020RDB-PC_SDCARD_defconfig
> > index c2b6ad5f32..81cbac2fe8 100644
> > --- a/configs/P2020RDB-PC_SDCARD_defconfig
> > +++ b/configs/P2020RDB-PC_SDCARD_defconfig
> > @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig
> > b/configs/P2020RDB-PC_SPIFLASH_defconfig
> > index 3ec208ee00..89308a503b 100644
> > --- a/configs/P2020RDB-PC_SPIFLASH_defconfig
> > +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
> > @@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -73,8 +74,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > diff --git a/configs/P2020RDB-PC_defconfig
> > b/configs/P2020RDB-PC_defconfig index 0f0a6ad810..66fc3b0a14 100644
> > --- a/configs/P2020RDB-PC_defconfig
> > +++ b/configs/P2020RDB-PC_defconfig
> > @@ -49,6 +49,7 @@ CONFIG_SPI_FLASH=y
> >  CONFIG_SF_DEFAULT_MODE=0
> >  CONFIG_SF_DEFAULT_SPEED=10000000
> >  CONFIG_SPI_FLASH_SPANSION=y
> > +CONFIG_PHY_FIXED=y
> >  CONFIG_PHY_ATHEROS=y
> >  CONFIG_PHY_BROADCOM=y
> >  CONFIG_PHY_DAVICOM=y
> > @@ -60,8 +61,10 @@ CONFIG_PHY_SMSC=y
> >  CONFIG_PHY_VITESSE=y
> >  CONFIG_PHY_GIGE=y
> >  CONFIG_E1000=y
> > +CONFIG_DM_ETH=y
> >  CONFIG_MII=y
> >  CONFIG_TSEC_ENET=y
> > +CONFIG_DM_MDIO=y
> >  CONFIG_DM_PCI=y
> >  CONFIG_DM_PCI_COMPAT=y
> >  CONFIG_PCIE_FSL=y
> > --
> > 2.25.1
> >