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[06/22] x86: mtrr: Fix 'ensable' typo

Message ID 20200522022326.238388-6-sjg@chromium.org
State Accepted
Commit 36c184bd0a6b73ae3a3ca096a7d04e45c5301e14
Headers show
Series x86: Enhance MTRR functionality to support multiple CPUs | expand

Commit Message

Simon Glass May 22, 2020, 2:23 a.m. UTC 
Fix a typo in the command help.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 cmd/x86/mtrr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index 084d7315f43..5d25c5802af 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -135,5 +135,5 @@  U_BOOT_CMD(
 	"set <reg> <type> <start> <size>   - set a register\n"
 	"\t<type> is Uncacheable, Combine, Through, Protect, Back\n"
 	"disable <reg>      - disable a register\n"
-	"ensable <reg>      - enable a register"
+	"enable <reg>       - enable a register"
 );