diff mbox series

[2/7] mmc: zynq_sdhci: Define timing macro's

Message ID 22b8d8014e6539a876c9761f70d9cd80fb8c1964.1590144247.git.michal.simek@xilinx.com
State New
Headers show
Series mmc: zynqmp_sdhci: Add support for Tap delay | expand

Commit Message

Michal Simek May 22, 2020, 10:44 a.m. UTC 
From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>

Define timing macro's for all the available speeds of mmc. This is
done similar to linux. Replace other macro's used in zynq_sdhci.c
with these new macro's.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---

 drivers/mmc/zynq_sdhci.c | 24 +++++++++++-------------
 include/mmc.h            | 13 +++++++++++++
 2 files changed, 24 insertions(+), 13 deletions(-)

Comments

Jaehoon Chung May 27, 2020, 6:47 a.m. UTC | #1 
On 5/22/20 7:44 PM, Michal Simek wrote:
> From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> 
> Define timing macro's for all the available speeds of mmc. This is
> done similar to linux. Replace other macro's used in zynq_sdhci.c
> with these new macro's.

Even though it's similar to linux, does it need to add new macro? 

> 
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
> ---
> 
>  drivers/mmc/zynq_sdhci.c | 24 +++++++++++-------------
>  include/mmc.h            | 13 +++++++++++++
>  2 files changed, 24 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index 94c69cf1c1bd..02583f76f936 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -32,20 +32,18 @@ struct arasan_sdhci_priv {
>  };
>  
>  #if defined(CONFIG_ARCH_ZYNQMP)
> -#define MMC_HS200_BUS_SPEED	5
> -
>  static const u8 mode2timing[] = {
> -	[MMC_LEGACY] = UHS_SDR12_BUS_SPEED,
> -	[MMC_HS] = HIGH_SPEED_BUS_SPEED,
> -	[SD_HS] = HIGH_SPEED_BUS_SPEED,
> -	[MMC_HS_52] = HIGH_SPEED_BUS_SPEED,
> -	[MMC_DDR_52] = HIGH_SPEED_BUS_SPEED,
> -	[UHS_SDR12] = UHS_SDR12_BUS_SPEED,
> -	[UHS_SDR25] = UHS_SDR25_BUS_SPEED,
> -	[UHS_SDR50] = UHS_SDR50_BUS_SPEED,
> -	[UHS_DDR50] = UHS_DDR50_BUS_SPEED,
> -	[UHS_SDR104] = UHS_SDR104_BUS_SPEED,
> -	[MMC_HS_200] = MMC_HS200_BUS_SPEED,
> +	[MMC_LEGACY] = MMC_TIMING_LEGACY,
> +	[MMC_HS] = MMC_TIMING_MMC_HS,
> +	[SD_HS] = MMC_TIMING_SD_HS,
> +	[MMC_HS_52] = MMC_TIMING_UHS_SDR50,
> +	[MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
> +	[UHS_SDR12] = MMC_TIMING_UHS_SDR12,
> +	[UHS_SDR25] = MMC_TIMING_UHS_SDR25,
> +	[UHS_SDR50] = MMC_TIMING_UHS_SDR50,
> +	[UHS_DDR50] = MMC_TIMING_UHS_DDR50,
> +	[UHS_SDR104] = MMC_TIMING_UHS_SDR104,
> +	[MMC_HS_200] = MMC_TIMING_MMC_HS200,
>  };
>  
>  #define SDHCI_TUNING_LOOP_COUNT	40
> diff --git a/include/mmc.h b/include/mmc.h
> index 82562193cc48..05d8ab8eeac6 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -360,6 +360,19 @@ enum mmc_voltage {
>  #define MMC_NUM_BOOT_PARTITION	2
>  #define MMC_PART_RPMB           3       /* RPMB partition number */
>  
> +/* timing specification used */
> +#define MMC_TIMING_LEGACY	0
> +#define MMC_TIMING_MMC_HS	1
> +#define MMC_TIMING_SD_HS	2
> +#define MMC_TIMING_UHS_SDR12	3
> +#define MMC_TIMING_UHS_SDR25	4
> +#define MMC_TIMING_UHS_SDR50	5
> +#define MMC_TIMING_UHS_SDR104	6
> +#define MMC_TIMING_UHS_DDR50	7
> +#define MMC_TIMING_MMC_DDR52	8
> +#define MMC_TIMING_MMC_HS200	9
> +#define MMC_TIMING_MMC_HS400	10
> +
>  /* Driver model support */
>  
>  /**
>
Faiz Abbas May 27, 2020, 6:58 a.m. UTC | #2 
Michal,

On 27/05/20 12:17 pm, Jaehoon Chung wrote:
> On 5/22/20 7:44 PM, Michal Simek wrote:
>> From: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
>>
>> Define timing macro's for all the available speeds of mmc. This is
>> done similar to linux. Replace other macro's used in zynq_sdhci.c
>> with these new macro's.
> 
> Even though it's similar to linux, does it need to add new macro? 
> 
>>
>> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
>> Signed-off-by: Michal Simek <michal.simek at xilinx.com>
>> ---
>>
>>  drivers/mmc/zynq_sdhci.c | 24 +++++++++++-------------
>>  include/mmc.h            | 13 +++++++++++++
>>  2 files changed, 24 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
>> index 94c69cf1c1bd..02583f76f936 100644
>> --- a/drivers/mmc/zynq_sdhci.c
>> +++ b/drivers/mmc/zynq_sdhci.c
>> @@ -32,20 +32,18 @@ struct arasan_sdhci_priv {
>>  };
>>  
>>  #if defined(CONFIG_ARCH_ZYNQMP)
>> -#define MMC_HS200_BUS_SPEED	5
>> -
>>  static const u8 mode2timing[] = {
>> -	[MMC_LEGACY] = UHS_SDR12_BUS_SPEED,
>> -	[MMC_HS] = HIGH_SPEED_BUS_SPEED,
>> -	[SD_HS] = HIGH_SPEED_BUS_SPEED,
>> -	[MMC_HS_52] = HIGH_SPEED_BUS_SPEED,
>> -	[MMC_DDR_52] = HIGH_SPEED_BUS_SPEED,
>> -	[UHS_SDR12] = UHS_SDR12_BUS_SPEED,
>> -	[UHS_SDR25] = UHS_SDR25_BUS_SPEED,
>> -	[UHS_SDR50] = UHS_SDR50_BUS_SPEED,
>> -	[UHS_DDR50] = UHS_DDR50_BUS_SPEED,
>> -	[UHS_SDR104] = UHS_SDR104_BUS_SPEED,
>> -	[MMC_HS_200] = MMC_HS200_BUS_SPEED,
>> +	[MMC_LEGACY] = MMC_TIMING_LEGACY,
>> +	[MMC_HS] = MMC_TIMING_MMC_HS,
>> +	[SD_HS] = MMC_TIMING_SD_HS,
>> +	[MMC_HS_52] = MMC_TIMING_UHS_SDR50,
>> +	[MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
>> +	[UHS_SDR12] = MMC_TIMING_UHS_SDR12,
>> +	[UHS_SDR25] = MMC_TIMING_UHS_SDR25,
>> +	[UHS_SDR50] = MMC_TIMING_UHS_SDR50,
>> +	[UHS_DDR50] = MMC_TIMING_UHS_DDR50,
>> +	[UHS_SDR104] = MMC_TIMING_UHS_SDR104,
>> +	[MMC_HS_200] = MMC_TIMING_MMC_HS200,
>>  };
>>  
>>  #define SDHCI_TUNING_LOOP_COUNT	40
>> diff --git a/include/mmc.h b/include/mmc.h
>> index 82562193cc48..05d8ab8eeac6 100644
>> --- a/include/mmc.h
>> +++ b/include/mmc.h
>> @@ -360,6 +360,19 @@ enum mmc_voltage {
>>  #define MMC_NUM_BOOT_PARTITION	2
>>  #define MMC_PART_RPMB           3       /* RPMB partition number */
>>  
>> +/* timing specification used */
>> +#define MMC_TIMING_LEGACY	0
>> +#define MMC_TIMING_MMC_HS	1
>> +#define MMC_TIMING_SD_HS	2
>> +#define MMC_TIMING_UHS_SDR12	3
>> +#define MMC_TIMING_UHS_SDR25	4
>> +#define MMC_TIMING_UHS_SDR50	5
>> +#define MMC_TIMING_UHS_SDR104	6
>> +#define MMC_TIMING_UHS_DDR50	7
>> +#define MMC_TIMING_MMC_DDR52	8
>> +#define MMC_TIMING_MMC_HS200	9
>> +#define MMC_TIMING_MMC_HS400	10
>> +
>>  /* Driver model support */
>>  

There's already an

enum bus_mode {
        MMC_LEGACY,
        MMC_HS,
        SD_HS,
        MMC_HS_52,
        MMC_DDR_52,
        UHS_SDR12,
        UHS_SDR25,
        UHS_SDR50,
        UHS_DDR50,
        UHS_SDR104,
        MMC_HS_200,
        MMC_HS_400,
        MMC_HS_400_ES,
        MMC_MODES_END
};

in this file. Thats what the mmc core uses to represent timing. Please use the same symbols.

Thanks,
Faiz
diff mbox series

Patch

diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index 94c69cf1c1bd..02583f76f936 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -32,20 +32,18 @@  struct arasan_sdhci_priv {
 };
 
 #if defined(CONFIG_ARCH_ZYNQMP)
-#define MMC_HS200_BUS_SPEED	5
-
 static const u8 mode2timing[] = {
-	[MMC_LEGACY] = UHS_SDR12_BUS_SPEED,
-	[MMC_HS] = HIGH_SPEED_BUS_SPEED,
-	[SD_HS] = HIGH_SPEED_BUS_SPEED,
-	[MMC_HS_52] = HIGH_SPEED_BUS_SPEED,
-	[MMC_DDR_52] = HIGH_SPEED_BUS_SPEED,
-	[UHS_SDR12] = UHS_SDR12_BUS_SPEED,
-	[UHS_SDR25] = UHS_SDR25_BUS_SPEED,
-	[UHS_SDR50] = UHS_SDR50_BUS_SPEED,
-	[UHS_DDR50] = UHS_DDR50_BUS_SPEED,
-	[UHS_SDR104] = UHS_SDR104_BUS_SPEED,
-	[MMC_HS_200] = MMC_HS200_BUS_SPEED,
+	[MMC_LEGACY] = MMC_TIMING_LEGACY,
+	[MMC_HS] = MMC_TIMING_MMC_HS,
+	[SD_HS] = MMC_TIMING_SD_HS,
+	[MMC_HS_52] = MMC_TIMING_UHS_SDR50,
+	[MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
+	[UHS_SDR12] = MMC_TIMING_UHS_SDR12,
+	[UHS_SDR25] = MMC_TIMING_UHS_SDR25,
+	[UHS_SDR50] = MMC_TIMING_UHS_SDR50,
+	[UHS_DDR50] = MMC_TIMING_UHS_DDR50,
+	[UHS_SDR104] = MMC_TIMING_UHS_SDR104,
+	[MMC_HS_200] = MMC_TIMING_MMC_HS200,
 };
 
 #define SDHCI_TUNING_LOOP_COUNT	40
diff --git a/include/mmc.h b/include/mmc.h
index 82562193cc48..05d8ab8eeac6 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -360,6 +360,19 @@  enum mmc_voltage {
 #define MMC_NUM_BOOT_PARTITION	2
 #define MMC_PART_RPMB           3       /* RPMB partition number */
 
+/* timing specification used */
+#define MMC_TIMING_LEGACY	0
+#define MMC_TIMING_MMC_HS	1
+#define MMC_TIMING_SD_HS	2
+#define MMC_TIMING_UHS_SDR12	3
+#define MMC_TIMING_UHS_SDR25	4
+#define MMC_TIMING_UHS_SDR50	5
+#define MMC_TIMING_UHS_SDR104	6
+#define MMC_TIMING_UHS_DDR50	7
+#define MMC_TIMING_MMC_DDR52	8
+#define MMC_TIMING_MMC_HS200	9
+#define MMC_TIMING_MMC_HS400	10
+
 /* Driver model support */
 
 /**