Message ID | 20200803124848.18295-1-peter.maydell@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | target/arm: Delete unused VFP_DREG macros | expand |
On 8/3/20 2:48 PM, Peter Maydell wrote: > As part of the Neon decodetree conversion we removed all > the uses of the VFP_DREG macros, but forgot to remove the > macro definitions. Do so now. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > target/arm/translate.c | 15 --------------- > 1 file changed, 15 deletions(-) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index c39a929b938..27bf6cd8b51 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -2471,21 +2471,6 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn) > return 1; > } > > -#define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n)) > -#define VFP_DREG(reg, insn, bigbit, smallbit) do { \ > - if (dc_isar_feature(aa32_simd_r32, s)) { \ > - reg = (((insn) >> (bigbit)) & 0x0f) \ > - | (((insn) >> ((smallbit) - 4)) & 0x10); \ > - } else { \ > - if (insn & (1 << (smallbit))) \ > - return 1; \ > - reg = ((insn) >> (bigbit)) & 0x0f; \ > - }} while (0) > - > -#define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22) > -#define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7) > -#define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5) > - > static inline bool use_goto_tb(DisasContext *s, target_ulong dest) > { > #ifndef CONFIG_USER_ONLY > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Peter Maydell <peter.maydell@linaro.org> writes: > As part of the Neon decodetree conversion we removed all > the uses of the VFP_DREG macros, but forgot to remove the > macro definitions. Do so now. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > --- > target/arm/translate.c | 15 --------------- > 1 file changed, 15 deletions(-) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index c39a929b938..27bf6cd8b51 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -2471,21 +2471,6 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn) > return 1; > } > > -#define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n)) > -#define VFP_DREG(reg, insn, bigbit, smallbit) do { \ > - if (dc_isar_feature(aa32_simd_r32, s)) { \ > - reg = (((insn) >> (bigbit)) & 0x0f) \ > - | (((insn) >> ((smallbit) - 4)) & 0x10); \ > - } else { \ > - if (insn & (1 << (smallbit))) \ > - return 1; \ > - reg = ((insn) >> (bigbit)) & 0x0f; \ > - }} while (0) > - > -#define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22) > -#define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7) > -#define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5) > - > static inline bool use_goto_tb(DisasContext *s, target_ulong dest) > { > #ifndef CONFIG_USER_ONLY -- Alex Bennée
diff --git a/target/arm/translate.c b/target/arm/translate.c index c39a929b938..27bf6cd8b51 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -2471,21 +2471,6 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn) return 1; } -#define VFP_REG_SHR(x, n) (((n) > 0) ? (x) >> (n) : (x) << -(n)) -#define VFP_DREG(reg, insn, bigbit, smallbit) do { \ - if (dc_isar_feature(aa32_simd_r32, s)) { \ - reg = (((insn) >> (bigbit)) & 0x0f) \ - | (((insn) >> ((smallbit) - 4)) & 0x10); \ - } else { \ - if (insn & (1 << (smallbit))) \ - return 1; \ - reg = ((insn) >> (bigbit)) & 0x0f; \ - }} while (0) - -#define VFP_DREG_D(reg, insn) VFP_DREG(reg, insn, 12, 22) -#define VFP_DREG_N(reg, insn) VFP_DREG(reg, insn, 16, 7) -#define VFP_DREG_M(reg, insn) VFP_DREG(reg, insn, 0, 5) - static inline bool use_goto_tb(DisasContext *s, target_ulong dest) { #ifndef CONFIG_USER_ONLY
As part of the Neon decodetree conversion we removed all the uses of the VFP_DREG macros, but forgot to remove the macro definitions. Do so now. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- target/arm/translate.c | 15 --------------- 1 file changed, 15 deletions(-) -- 2.20.1