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spi: pxa2xx: Add SSC2 and SSPSP2 SSP registers

Message ID 20200825171730.17638-1-cezary.rojewski@intel.com
State New
Headers show
Series spi: pxa2xx: Add SSC2 and SSPSP2 SSP registers | expand

Commit Message

Cezary Rojewski Aug. 25, 2020, 5:17 p.m. UTC
Update list of SSP registers with SSC2 and SSPSP2. These registers are
utilized by LPT/WPT AudioDSP architecture.

While SSC2 shares the same offset (0x40) as SSACDD, description of this
register for SSP device present on mentioned AudioDSP is different so
define separate constant to avoid any ambiguity.

Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
 include/linux/pxa2xx_ssp.h | 2 ++
 1 file changed, 2 insertions(+)
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Patch

diff --git a/include/linux/pxa2xx_ssp.h b/include/linux/pxa2xx_ssp.h
index 6facf27865f9..935d7db5bc32 100644
--- a/include/linux/pxa2xx_ssp.h
+++ b/include/linux/pxa2xx_ssp.h
@@ -41,6 +41,8 @@ 
 #define SSTSS		(0x38)  /* SSP Timeslot Status */
 #define SSACD		(0x3C)  /* SSP Audio Clock Divider */
 #define SSACDD		(0x40)	/* SSP Audio Clock Dither Divider */
+#define SSC2		(0x40)	/* SSP Command / Status 2 */
+#define SSPSP2		(0x44)	/* SSP Programmable Serial Protocol 2 */
 
 /* Common PXA2xx bits first */
 #define SSCR0_DSS	(0x0000000f)	/* Data Size Select (mask) */