| Message ID | 1394185272-26054-4-git-send-email-maxime.coquelin@st.com |
|---|---|
| State | New |
| Headers | show |
Hi Peppe, Thanks for the patch. On 07/03/14 09:41, Maxime COQUELIN wrote: > From: Giuseppe Cavallaro <peppe.cavallaro@st.com> > > This patch adds a new logic inside the st pinctrl to manage > an unsupported scenario: some sysconfig are not available! > > This is the case of STiH407 where, although documented, the > following registers from SYSCFG_FLASH have been removed from the SoC. > > SYSTEM_CONFIG3040 > Output Enable pad control for all PIO Alternate Functions > and > SYSTEM_ CONFIG3050 > Pull Up pad control for all PIO Alternate Functions > > Without managing this condition an imprecise external abort > will be detect. > > To do this the patch also reviews the st_parse_syscfgs > and other routines to manipulate the registers only if > actually available. > In any case, for example the st_parse_syscfgs detected > an error condition but no action was made in the > st_pctl_probe_dt. > > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > --- Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> --srini -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Peppe/Maxime, I missed a comment... :-) On 07/03/14 09:41, Maxime COQUELIN wrote: > From: Giuseppe Cavallaro <peppe.cavallaro@st.com> > > This patch adds a new logic inside the st pinctrl to manage > an unsupported scenario: some sysconfig are not available! > > This is the case of STiH407 where, although documented, the > following registers from SYSCFG_FLASH have been removed from the SoC. > > SYSTEM_CONFIG3040 > Output Enable pad control for all PIO Alternate Functions > and > SYSTEM_ CONFIG3050 > Pull Up pad control for all PIO Alternate Functions > > Without managing this condition an imprecise external abort > will be detect. > > To do this the patch also reviews the st_parse_syscfgs > and other routines to manipulate the registers only if > actually available. > In any case, for example the st_parse_syscfgs detected > an error condition but no action was made in the > st_pctl_probe_dt. > > Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> > Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> > --- > drivers/pinctrl/pinctrl-st.c | 121 +++++++++++++++++++++++++++---------------- > 1 file changed, 75 insertions(+), 46 deletions(-) > > diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c > index 9e9b6ea..d1886b4 100644 > --- a/drivers/pinctrl/pinctrl-st.c > +++ b/drivers/pinctrl/pinctrl-st.c > @@ -390,6 +390,19 @@ static const struct st_pctl_data stih416_data = { > .alt = 0, .oe = 40, .pu = 50, .od = 60, .rt = 100, > }; > > +static const struct st_pctl_data stih407_flashdata = { > + .rt_style = st_retime_style_none, > + .input_delays = stih416_delays, > + .ninput_delays = 14, > + .output_delays = stih416_delays, > + .noutput_delays = 14, > + .alt = 0, > + .oe = -1, /* Not Available */ > + .pu = -1, /* Not Available */ > + .od = 60, > + .rt = 100, > +}; > + I think this stih407_flashdata go with the previous patch "pinctrl: st: add pinctrl support for the STiH407 SoC" So that this patch just adds new checks to pinctrl-driver and not stih407 related stuff. Other than that the patch looks good to me. > } > > /* > @@ -1583,7 +1612,7 @@ static struct of_device_id st_pctl_of_match[] = { > { .compatible = "st,stih407-sbc-pinctrl", .data = &stih416_data}, > { .compatible = "st,stih407-front-pinctrl", .data = &stih416_data}, > { .compatible = "st,stih407-rear-pinctrl", .data = &stih416_data}, > - { .compatible = "st,stih407-flash-pinctrl", .data = &stih416_data}, > + { .compatible = "st,stih407-flash-pinctrl", .data = &stih407_flashdata}, Same as first comment. > { /* sentinel */ } > }; > > Thanks, srini -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 07/03/14 11:28, Maxime Coquelin wrote: >> > > Problem is that "oe" and "pu" takes -1 in that patch, and these values > will be passed directly to devm_regmap_field_alloc without any check. > > I propose to apply this patch before "pinctrl: st: add pinctrl support > for the STiH407 SoC", and move stih407_flashdata as you recommend. > > Is it fine for you? Am OK with re-ordering, This will also be good for git bisect... :-) Thanks, srini > > Thanks for the review, > Maxime -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Srini, On 03/07/2014 11:41 AM, srinivas kandagatla wrote: > Hi Peppe/Maxime, > I missed a comment... :-) > > > On 07/03/14 09:41, Maxime COQUELIN wrote: >> From: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> >> This patch adds a new logic inside the st pinctrl to manage >> an unsupported scenario: some sysconfig are not available! >> >> This is the case of STiH407 where, although documented, the >> following registers from SYSCFG_FLASH have been removed from the SoC. >> >> SYSTEM_CONFIG3040 >> Output Enable pad control for all PIO Alternate Functions >> and >> SYSTEM_ CONFIG3050 >> Pull Up pad control for all PIO Alternate Functions >> >> Without managing this condition an imprecise external abort >> will be detect. >> >> To do this the patch also reviews the st_parse_syscfgs >> and other routines to manipulate the registers only if >> actually available. >> In any case, for example the st_parse_syscfgs detected >> an error condition but no action was made in the >> st_pctl_probe_dt. >> >> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com> >> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> >> --- >> drivers/pinctrl/pinctrl-st.c | 121 +++++++++++++++++++++++++++---------------- >> 1 file changed, 75 insertions(+), 46 deletions(-) >> >> diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c >> index 9e9b6ea..d1886b4 100644 >> --- a/drivers/pinctrl/pinctrl-st.c >> +++ b/drivers/pinctrl/pinctrl-st.c >> @@ -390,6 +390,19 @@ static const struct st_pctl_data stih416_data = { >> .alt = 0, .oe = 40, .pu = 50, .od = 60, .rt = 100, >> }; >> >> +static const struct st_pctl_data stih407_flashdata = { >> + .rt_style = st_retime_style_none, >> + .input_delays = stih416_delays, >> + .ninput_delays = 14, >> + .output_delays = stih416_delays, >> + .noutput_delays = 14, >> + .alt = 0, >> + .oe = -1, /* Not Available */ >> + .pu = -1, /* Not Available */ >> + .od = 60, >> + .rt = 100, >> +}; >> + > > I think this stih407_flashdata go with the previous patch "pinctrl: st: > add pinctrl support for the STiH407 SoC" > > So that this patch just adds new checks to pinctrl-driver and not > stih407 related stuff. Problem is that "oe" and "pu" takes -1 in that patch, and these values will be passed directly to devm_regmap_field_alloc without any check. I propose to apply this patch before "pinctrl: st: add pinctrl support for the STiH407 SoC", and move stih407_flashdata as you recommend. Is it fine for you? Thanks for the review, Maxime > > Other than that the patch looks good to me. > >> } >> >> /* >> @@ -1583,7 +1612,7 @@ static struct of_device_id st_pctl_of_match[] = { >> { .compatible = "st,stih407-sbc-pinctrl", .data = &stih416_data}, >> { .compatible = "st,stih407-front-pinctrl", .data = &stih416_data}, >> { .compatible = "st,stih407-rear-pinctrl", .data = &stih416_data}, >> - { .compatible = "st,stih407-flash-pinctrl", .data = &stih416_data}, >> + { .compatible = "st,stih407-flash-pinctrl", .data = &stih407_flashdata}, > Same as first comment. >> { /* sentinel */ } >> }; >> >> > > > Thanks, > srini > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c index 9e9b6ea..d1886b4 100644 --- a/drivers/pinctrl/pinctrl-st.c +++ b/drivers/pinctrl/pinctrl-st.c @@ -390,6 +390,19 @@ static const struct st_pctl_data stih416_data = { .alt = 0, .oe = 40, .pu = 50, .od = 60, .rt = 100, }; +static const struct st_pctl_data stih407_flashdata = { + .rt_style = st_retime_style_none, + .input_delays = stih416_delays, + .ninput_delays = 14, + .output_delays = stih416_delays, + .noutput_delays = 14, + .alt = 0, + .oe = -1, /* Not Available */ + .pu = -1, /* Not Available */ + .od = 60, + .rt = 100, +}; + /* Low level functions.. */ static inline int st_gpio_bank(int gpio) { @@ -410,25 +423,27 @@ static void st_pinconf_set_config(struct st_pio_control *pc, unsigned int oe_value, pu_value, od_value; unsigned long mask = BIT(pin); - regmap_field_read(output_enable, &oe_value); - regmap_field_read(pull_up, &pu_value); - regmap_field_read(open_drain, &od_value); - - /* Clear old values */ - oe_value &= ~mask; - pu_value &= ~mask; - od_value &= ~mask; - - if (config & ST_PINCONF_OE) - oe_value |= mask; - if (config & ST_PINCONF_PU) - pu_value |= mask; - if (config & ST_PINCONF_OD) - od_value |= mask; - - regmap_field_write(output_enable, oe_value); - regmap_field_write(pull_up, pu_value); - regmap_field_write(open_drain, od_value); + if (output_enable) { + regmap_field_read(output_enable, &oe_value); + oe_value &= ~mask; + if (config & ST_PINCONF_OE) + oe_value |= mask; + regmap_field_write(output_enable, oe_value); + } + if (pull_up) { + regmap_field_read(pull_up, &pu_value); + pu_value &= ~mask; + if (config & ST_PINCONF_PU) + pu_value |= mask; + regmap_field_write(pull_up, pu_value); + } + if (open_drain) { + regmap_field_read(open_drain, &od_value); + od_value &= ~mask; + if (config & ST_PINCONF_OD) + od_value |= mask; + regmap_field_write(open_drain, od_value); + } } static void st_pctl_set_function(struct st_pio_control *pc, @@ -439,6 +454,9 @@ static void st_pctl_set_function(struct st_pio_control *pc, int pin = st_gpio_pin(pin_id); int offset = pin * 4; + if (!alt) + return; + regmap_field_read(alt, &val); val &= ~(0xf << offset); val |= function << offset; @@ -571,22 +589,28 @@ static void st_pinconf_set_retime_dedicated(struct st_pinctrl *info, regmap_field_write(rt_d->rt[pin], retime_config); } -static void st_pinconf_get_direction(struct st_pio_control *pc, - int pin, unsigned long *config) +static void st_pinconf_get_direction(struct st_pio_control *pc, int pin, + unsigned long *config) { unsigned int oe_value, pu_value, od_value; - regmap_field_read(pc->oe, &oe_value); - regmap_field_read(pc->pu, &pu_value); - regmap_field_read(pc->od, &od_value); + if (pc->oe) { + regmap_field_read(pc->oe, &oe_value); + if (oe_value & BIT(pin)) + ST_PINCONF_PACK_OE(*config); + } - if (oe_value & BIT(pin)) - ST_PINCONF_PACK_OE(*config); - if (pu_value & BIT(pin)) - ST_PINCONF_PACK_PU(*config); - if (od_value & BIT(pin)) - ST_PINCONF_PACK_OD(*config); + if (pc->pu) { + regmap_field_read(pc->pu, &pu_value); + if (pu_value & BIT(pin)) + ST_PINCONF_PACK_PU(*config); + } + if (pc->od) { + regmap_field_read(pc->od, &od_value); + if (od_value & BIT(pin)) + ST_PINCONF_PACK_OD(*config); + } } static int st_pinconf_get_retime_packed(struct st_pinctrl *info, @@ -1105,8 +1129,21 @@ static int st_pctl_dt_setup_retime(struct st_pinctrl *info, return -EINVAL; } -static int st_parse_syscfgs(struct st_pinctrl *info, - int bank, struct device_node *np) + +static struct regmap_field *st_pc_get_value(struct device *dev, + struct regmap *regmap, int bank, + int data, int lsb, int msb) +{ + struct reg_field reg = REG_FIELD((data + bank) * 4, lsb, msb); + + if (data < 0) + return NULL; + + return devm_regmap_field_alloc(dev, regmap, reg); +} + +static void st_parse_syscfgs(struct st_pinctrl *info, int bank, + struct device_node *np) { const struct st_pctl_data *data = info->data; /** @@ -1116,29 +1153,21 @@ static int st_parse_syscfgs(struct st_pinctrl *info, */ int lsb = (bank%4) * ST_GPIO_PINS_PER_BANK; int msb = lsb + ST_GPIO_PINS_PER_BANK - 1; - struct reg_field alt_reg = REG_FIELD((data->alt + bank) * 4, 0, 31); - struct reg_field oe_reg = REG_FIELD((data->oe + bank/4) * 4, lsb, msb); - struct reg_field pu_reg = REG_FIELD((data->pu + bank/4) * 4, lsb, msb); - struct reg_field od_reg = REG_FIELD((data->od + bank/4) * 4, lsb, msb); struct st_pio_control *pc = &info->banks[bank].pc; struct device *dev = info->dev; struct regmap *regmap = info->regmap; - pc->alt = devm_regmap_field_alloc(dev, regmap, alt_reg); - pc->oe = devm_regmap_field_alloc(dev, regmap, oe_reg); - pc->pu = devm_regmap_field_alloc(dev, regmap, pu_reg); - pc->od = devm_regmap_field_alloc(dev, regmap, od_reg); - - if (IS_ERR(pc->alt) || IS_ERR(pc->oe) || - IS_ERR(pc->pu) || IS_ERR(pc->od)) - return -EINVAL; + pc->alt = st_pc_get_value(dev, regmap, bank, data->alt, 0, 31); + pc->oe = st_pc_get_value(dev, regmap, bank/4, data->oe, lsb, msb); + pc->pu = st_pc_get_value(dev, regmap, bank/4, data->pu, lsb, msb); + pc->od = st_pc_get_value(dev, regmap, bank/4, data->od, lsb, msb); /* retime avaiable for all pins by default */ pc->rt_pin_mask = 0xff; of_property_read_u32(np, "st,retime-pin-mask", &pc->rt_pin_mask); st_pctl_dt_setup_retime(info, bank, pc); - return 0; + return; } /* @@ -1583,7 +1612,7 @@ static struct of_device_id st_pctl_of_match[] = { { .compatible = "st,stih407-sbc-pinctrl", .data = &stih416_data}, { .compatible = "st,stih407-front-pinctrl", .data = &stih416_data}, { .compatible = "st,stih407-rear-pinctrl", .data = &stih416_data}, - { .compatible = "st,stih407-flash-pinctrl", .data = &stih416_data}, + { .compatible = "st,stih407-flash-pinctrl", .data = &stih407_flashdata}, { /* sentinel */ } };