diff mbox

[02/16] target-arm: A64: Fix bug in add_sub_ext handling of rn

Message ID 1394377867-7115-3-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show

Commit Message

Peter Maydell March 9, 2014, 3:10 p.m. UTC
From: Alex Bennée <alex.bennee@linaro.org>

rn == 31 always means SP (not XZR) whether an add_sub_ext
instruction is setting the flags or not; only rd has behaviour
dependent on whether we are setting flags.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target-arm/translate-a64.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Laurent Desnogues March 13, 2014, 8:04 a.m. UTC | #1
On Sun, Mar 9, 2014 at 4:10 PM, Peter Maydell <peter.maydell@linaro.org> wrote:
> From: Alex Bennée <alex.bennee@linaro.org>
>
> rn == 31 always means SP (not XZR) whether an add_sub_ext
> instruction is setting the flags or not; only rd has behaviour
> dependent on whether we are setting flags.
>
> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>

Thanks,

Laurent

> ---
>  target-arm/translate-a64.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
> index f89b0a5..90936cd 100644
> --- a/target-arm/translate-a64.c
> +++ b/target-arm/translate-a64.c
> @@ -3096,12 +3096,11 @@ static void disas_add_sub_ext_reg(DisasContext *s, uint32_t insn)
>
>      /* non-flag setting ops may use SP */
>      if (!setflags) {
> -        tcg_rn = read_cpu_reg_sp(s, rn, sf);
>          tcg_rd = cpu_reg_sp(s, rd);
>      } else {
> -        tcg_rn = read_cpu_reg(s, rn, sf);
>          tcg_rd = cpu_reg(s, rd);
>      }
> +    tcg_rn = read_cpu_reg_sp(s, rn, sf);
>
>      tcg_rm = read_cpu_reg(s, rm, sf);
>      ext_and_shift_reg(tcg_rm, tcg_rm, option, imm3);
> --
> 1.9.0
>
diff mbox

Patch

diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index f89b0a5..90936cd 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -3096,12 +3096,11 @@  static void disas_add_sub_ext_reg(DisasContext *s, uint32_t insn)
 
     /* non-flag setting ops may use SP */
     if (!setflags) {
-        tcg_rn = read_cpu_reg_sp(s, rn, sf);
         tcg_rd = cpu_reg_sp(s, rd);
     } else {
-        tcg_rn = read_cpu_reg(s, rn, sf);
         tcg_rd = cpu_reg(s, rd);
     }
+    tcg_rn = read_cpu_reg_sp(s, rn, sf);
 
     tcg_rm = read_cpu_reg(s, rm, sf);
     ext_and_shift_reg(tcg_rm, tcg_rm, option, imm3);