| Message ID | 1395686975-12649-5-git-send-email-stefano.stabellini@eu.citrix.com |
|---|---|
| State | New |
| Headers | show |
On 03/24/2014 06:49 PM, Stefano Stabellini wrote: > Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Julien Grall <julien.grall@linaro.org> > --- > xen/arch/arm/gic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index 3262db3..5cdcd15 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -56,7 +56,7 @@ static irq_desc_t irq_desc[NR_IRQS]; > static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); > static DEFINE_PER_CPU(uint64_t, lr_mask); > > -static unsigned nr_lrs; > +static uint8_t nr_lrs; > #define lr_all_full() (this_cpu(lr_mask) == ((1 << nr_lrs) - 1)) > > /* The GIC mapping of CPU interfaces does not necessarily match the >
On Mon, 2014-03-24 at 18:49 +0000, Stefano Stabellini wrote: > Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Does this change anything in practice? Hopefully the compiler doesn't start doing stupid word access + mask on every access... Might there be more LRs with e.g. gic v3? > --- > xen/arch/arm/gic.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index 3262db3..5cdcd15 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -56,7 +56,7 @@ static irq_desc_t irq_desc[NR_IRQS]; > static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); > static DEFINE_PER_CPU(uint64_t, lr_mask); > > -static unsigned nr_lrs; > +static uint8_t nr_lrs; > #define lr_all_full() (this_cpu(lr_mask) == ((1 << nr_lrs) - 1)) > > /* The GIC mapping of CPU interfaces does not necessarily match the
On 04/01/2014 12:59 PM, Ian Campbell wrote: > On Mon, 2014-03-24 at 18:49 +0000, Stefano Stabellini wrote: >> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> > > Does this change anything in practice? Patch #6 of Stefano's series keep track of LRs with an uint8 bits. I asked for this patch to stupid issue later because the tracking use an smaller number of bits. > Hopefully the compiler doesn't start doing stupid word access + mask on > every access... > > Might there be more LRs with e.g. gic v3? The number of LRs is encoded on 5 bits for the GICv3.
On Tue, 2014-04-01 at 13:12 +0100, Julien Grall wrote: > On 04/01/2014 12:59 PM, Ian Campbell wrote: > > On Mon, 2014-03-24 at 18:49 +0000, Stefano Stabellini wrote: > >> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> > > > > Does this change anything in practice? > > Patch #6 of Stefano's series keep track of LRs with an uint8 bits. I > asked for this patch to stupid issue later because the tracking use an > smaller number of bits. I wish that sort of thing would be mentioned in commit messages. > > > Hopefully the compiler doesn't start doing stupid word access + mask on > > every access... > > > > Might there be more LRs with e.g. gic v3? > > The number of LRs is encoded on 5 bits for the GICv3. >
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 3262db3..5cdcd15 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -56,7 +56,7 @@ static irq_desc_t irq_desc[NR_IRQS]; static DEFINE_PER_CPU(irq_desc_t[NR_LOCAL_IRQS], local_irq_desc); static DEFINE_PER_CPU(uint64_t, lr_mask); -static unsigned nr_lrs; +static uint8_t nr_lrs; #define lr_all_full() (this_cpu(lr_mask) == ((1 << nr_lrs) - 1)) /* The GIC mapping of CPU interfaces does not necessarily match the
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> --- xen/arch/arm/gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)