diff mbox series

[4/4] microvm: reconfigure irqs if second ioapic is available

Message ID 20201016114328.18835-5-kraxel@redhat.com
State New
Headers show
Series RfC: microvm: add second ioapic | expand

Commit Message

Gerd Hoffmann Oct. 16, 2020, 11:43 a.m. UTC
Use GSI 16+ for PCIe (needs acpi_build_madt() tweak).
Use GSI 24+ (second ioapic) for virtio-mmio.
Use all irq lines of the second ioapic
and allow up to 24 virtio-mmio devices.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
 hw/i386/acpi-common.c | 2 +-
 hw/i386/microvm.c     | 6 +++++-
 2 files changed, 6 insertions(+), 2 deletions(-)

Comments

Igor Mammedov Oct. 23, 2020, 6:52 p.m. UTC | #1
On Fri, 16 Oct 2020 13:43:28 +0200
Gerd Hoffmann <kraxel@redhat.com> wrote:

> Use GSI 16+ for PCIe (needs acpi_build_madt() tweak).
> Use GSI 24+ (second ioapic) for virtio-mmio.
> Use all irq lines of the second ioapic
> and allow up to 24 virtio-mmio devices.

description is  missing answer to question why it's done.


> 
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>  hw/i386/acpi-common.c | 2 +-
>  hw/i386/microvm.c     | 6 +++++-
>  2 files changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
> index f0689392a39f..1653a8315248 100644
> --- a/hw/i386/acpi-common.c
> +++ b/hw/i386/acpi-common.c
> @@ -122,7 +122,7 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
>          intsrcovr->flags  = cpu_to_le16(0); /* conforms to bus specifications */
>      }
>  
> -    for (i = 1; i < 16; i++) {
> +    for (i = 1; i < 24; i++) {
>          if (!(x86ms->pci_irq_mask & (1 << i))) {
>              /* No need for a INT source override structure. */
>              continue;
> diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
> index 15c3e078a4aa..70bb8a4e3954 100644
> --- a/hw/i386/microvm.c
> +++ b/hw/i386/microvm.c
> @@ -205,7 +205,11 @@ static void microvm_devices_init(MicrovmMachineState *mms)
>  
>      mms->virtio_irq_base = 5;
>      mms->virtio_num_transports = 8;
> -    if (x86_machine_is_acpi_enabled(x86ms)) {
> +    if (ioapic2) {
> +        mms->pcie_irq_base = 16;
> +        mms->virtio_irq_base = 24;
> +        mms->virtio_num_transports = 24;
> +    } else if (x86_machine_is_acpi_enabled(x86ms)) {
>          mms->pcie_irq_base = 12;
>          mms->virtio_irq_base = 16;
>      }
Gerd Hoffmann Oct. 26, 2020, 8:25 a.m. UTC | #2
On Fri, Oct 23, 2020 at 08:52:09PM +0200, Igor Mammedov wrote:
> On Fri, 16 Oct 2020 13:43:28 +0200
> Gerd Hoffmann <kraxel@redhat.com> wrote:
> 
> > Use GSI 16+ for PCIe (needs acpi_build_madt() tweak).
> > Use GSI 24+ (second ioapic) for virtio-mmio.
> > Use all irq lines of the second ioapic
> > and allow up to 24 virtio-mmio devices.
        ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> description is  missing answer to question why it's done.

It's right there.  We can support more virtio devices then ;)

take care,
  Gerd
diff mbox series

Patch

diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
index f0689392a39f..1653a8315248 100644
--- a/hw/i386/acpi-common.c
+++ b/hw/i386/acpi-common.c
@@ -122,7 +122,7 @@  void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
         intsrcovr->flags  = cpu_to_le16(0); /* conforms to bus specifications */
     }
 
-    for (i = 1; i < 16; i++) {
+    for (i = 1; i < 24; i++) {
         if (!(x86ms->pci_irq_mask & (1 << i))) {
             /* No need for a INT source override structure. */
             continue;
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 15c3e078a4aa..70bb8a4e3954 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -205,7 +205,11 @@  static void microvm_devices_init(MicrovmMachineState *mms)
 
     mms->virtio_irq_base = 5;
     mms->virtio_num_transports = 8;
-    if (x86_machine_is_acpi_enabled(x86ms)) {
+    if (ioapic2) {
+        mms->pcie_irq_base = 16;
+        mms->virtio_irq_base = 24;
+        mms->virtio_num_transports = 24;
+    } else if (x86_machine_is_acpi_enabled(x86ms)) {
         mms->pcie_irq_base = 12;
         mms->virtio_irq_base = 16;
     }