diff mbox series

target/xtensa: enable all coprocessors for linux-user

Message ID 20200829104758.22337-1-jcmvbkbc@gmail.com
State Accepted
Commit ab97f0505bec6280c5455009b7678daf5c9278bc
Headers show
Series target/xtensa: enable all coprocessors for linux-user | expand

Commit Message

Max Filippov Aug. 29, 2020, 10:47 a.m. UTC
Linux userspace always sees coprocessors as enabled. CPENABLE register
and coprocessor exceptions are used internally by the kernel to manage
lazy coprocessor context switch. None of it is needed for linux-user.
Always enable all coprocessors for user emulation.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 target/xtensa/cpu.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Laurent Vivier Oct. 26, 2020, 11:07 a.m. UTC | #1
Le 29/08/2020 à 12:47, Max Filippov a écrit :
> Linux userspace always sees coprocessors as enabled. CPENABLE register

> and coprocessor exceptions are used internally by the kernel to manage

> lazy coprocessor context switch. None of it is needed for linux-user.

> Always enable all coprocessors for user emulation.

> 

> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

> ---

>  target/xtensa/cpu.c | 1 +

>  1 file changed, 1 insertion(+)

> 

> diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c

> index 6a033e778c95..88a32268a18b 100644

> --- a/target/xtensa/cpu.c

> +++ b/target/xtensa/cpu.c

> @@ -93,6 +93,7 @@ static void xtensa_cpu_reset(DeviceState *dev)

>          !xtensa_abi_call0()) {

>          env->sregs[PS] |= PS_WOE;

>      }

> +    env->sregs[CPENABLE] = 0xff;

>  #endif

>      env->sregs[VECBASE] = env->config->vecbase;

>      env->sregs[IBREAKENABLE] = 0;

> 


Applied to my linux-user-for-5.2 branch.

Thanks,
Laurent
diff mbox series

Patch

diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index 6a033e778c95..88a32268a18b 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -93,6 +93,7 @@  static void xtensa_cpu_reset(DeviceState *dev)
         !xtensa_abi_call0()) {
         env->sregs[PS] |= PS_WOE;
     }
+    env->sregs[CPENABLE] = 0xff;
 #endif
     env->sregs[VECBASE] = env->config->vecbase;
     env->sregs[IBREAKENABLE] = 0;