[4/4] mcpm: exynos: populate suspend and powered_up callbacks

Message ID 1398080958-21677-5-git-send-email-chander.kashyap@linaro.org
State New
Headers show

Commit Message

Chander Kashyap April 21, 2014, 11:49 a.m.
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.

Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Chander Kashyap <k.chander@samsung.com>
---
 arch/arm/mach-exynos/mcpm-exynos.c |   53 ++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

Comments

Daniel Lezcano April 22, 2014, 10:51 a.m. | #1
On 04/21/2014 01:49 PM, Chander Kashyap wrote:
> In order to support cpuidle through mcpm, suspend and powered-up
> callbacks are required in mcpm platform code.
> Hence populate the same callbacks.
>
> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
> Signed-off-by: Chander Kashyap <k.chander@samsung.com>
> ---
>   arch/arm/mach-exynos/mcpm-exynos.c |   53 ++++++++++++++++++++++++++++++++++++
>   1 file changed, 53 insertions(+)
>
> diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
> index 46d4968..16af0bd 100644
> --- a/arch/arm/mach-exynos/mcpm-exynos.c
> +++ b/arch/arm/mach-exynos/mcpm-exynos.c
> @@ -318,10 +318,63 @@ static int exynos_power_down_finish(unsigned int cpu, unsigned int cluster)
>   	return 0; /* success: the CPU is halted */
>   }
>
> +static void enable_coherency(void)
> +{
> +	unsigned long v, u;
> +
> +	asm volatile(
> +		"mrc	p15, 0, %0, c1, c0, 1\n"
> +		"orr	%0, %0, %2\n"
> +		"ldr	%1, [%3]\n"
> +		"and	%1, %1, #0\n"
> +		"orr	%0, %0, %1\n"
> +		"mcr	p15, 0, %0, c1, c0, 1\n"
> +		: "=&r" (v), "=&r" (u)
> +		: "Ir" (0x40), "Ir" (S5P_INFORM0)
> +		: "cc");
> +}

Shouldn't this function to be used from hotplug.c also ?

> +
> +void exynos_powered_up(void)
> +{
> +	unsigned int mpidr, cpu, cluster;
> +
> +	mpidr = read_cpuid_mpidr();
> +	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
> +	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
> +
> +	arch_spin_lock(&bl_lock);
> +	if (cpu_use_count[cpu][cluster] == 0)
> +		cpu_use_count[cpu][cluster] = 1;
> +	arch_spin_unlock(&bl_lock);
> +}
> +
> +static void exynos_suspend(u64 residency)
> +{
> +	unsigned int mpidr, cpunr;
> +
> +	mpidr = read_cpuid_mpidr();
> +	cpunr = enynos_pmu_cpunr(mpidr);

*enynos*_pmu_cpunr ?

> +
> +	__raw_writel(virt_to_phys(mcpm_entry_point), REG_ENTRY_ADDR);
> +
> +	exynos_power_down();
> +
> +	/*
> +	 * Execution reaches here only if cpu did not power down.
> +	 * Hence roll back the changes done in exynos_power_down function.
> +	*/
> +	__raw_writel(EXYNOS_CORE_LOCAL_PWR_EN,
> +			EXYNOS_ARM_CORE_CONFIGURATION(cpunr));

Why don't you use the functions defined in the

patch 5/5 arm: exynos: Add MCPM call-back functions

exynos_core_power_control() ?

> +	set_cr(get_cr() | CR_C);
> +	enable_coherency();
> +}
> +
>   static const struct mcpm_platform_ops exynos_power_ops = {
>   	.power_up		= exynos_power_up,
>   	.power_down		= exynos_power_down,
>   	.power_down_finish	= exynos_power_down_finish,
> +	.suspend		= exynos_suspend,
> +	.powered_up		= exynos_powered_up,
>   };
>
>   static void __init exynos_mcpm_usage_count_init(void)
>
Chander Kashyap April 23, 2014, 8:22 a.m. | #2
On 22 April 2014 16:21, Daniel Lezcano <daniel.lezcano@linaro.org> wrote:
> On 04/21/2014 01:49 PM, Chander Kashyap wrote:
>>
>> In order to support cpuidle through mcpm, suspend and powered-up
>> callbacks are required in mcpm platform code.
>> Hence populate the same callbacks.
>>
>> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
>> Signed-off-by: Chander Kashyap <k.chander@samsung.com>
>> ---
>>   arch/arm/mach-exynos/mcpm-exynos.c |   53
>> ++++++++++++++++++++++++++++++++++++
>>   1 file changed, 53 insertions(+)
>>
>> diff --git a/arch/arm/mach-exynos/mcpm-exynos.c
>> b/arch/arm/mach-exynos/mcpm-exynos.c
>> index 46d4968..16af0bd 100644
>> --- a/arch/arm/mach-exynos/mcpm-exynos.c
>> +++ b/arch/arm/mach-exynos/mcpm-exynos.c
>> @@ -318,10 +318,63 @@ static int exynos_power_down_finish(unsigned int
>> cpu, unsigned int cluster)
>>         return 0; /* success: the CPU is halted */
>>   }
>>
>> +static void enable_coherency(void)
>> +{
>> +       unsigned long v, u;
>> +
>> +       asm volatile(
>> +               "mrc    p15, 0, %0, c1, c0, 1\n"
>> +               "orr    %0, %0, %2\n"
>> +               "ldr    %1, [%3]\n"
>> +               "and    %1, %1, #0\n"
>> +               "orr    %0, %0, %1\n"
>> +               "mcr    p15, 0, %0, c1, c0, 1\n"
>> +               : "=&r" (v), "=&r" (u)
>> +               : "Ir" (0x40), "Ir" (S5P_INFORM0)
>> +               : "cc");
>> +}
>
>
> Shouldn't this function to be used from hotplug.c also ?

Hotplug.c already taking care for this. And anyhow that will go away
for mcpm dependent SoCs

>
>
>> +
>> +void exynos_powered_up(void)
>> +{
>> +       unsigned int mpidr, cpu, cluster;
>> +
>> +       mpidr = read_cpuid_mpidr();
>> +       cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
>> +       cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
>> +
>> +       arch_spin_lock(&bl_lock);
>> +       if (cpu_use_count[cpu][cluster] == 0)
>> +               cpu_use_count[cpu][cluster] = 1;
>> +       arch_spin_unlock(&bl_lock);
>> +}
>> +
>> +static void exynos_suspend(u64 residency)
>> +{
>> +       unsigned int mpidr, cpunr;
>> +
>> +       mpidr = read_cpuid_mpidr();
>> +       cpunr = enynos_pmu_cpunr(mpidr);
>
>
> *enynos*_pmu_cpunr ?

oops, I will fix typo

>
>
>> +
>> +       __raw_writel(virt_to_phys(mcpm_entry_point), REG_ENTRY_ADDR);
>> +
>> +       exynos_power_down();
>> +
>> +       /*
>> +        * Execution reaches here only if cpu did not power down.
>> +        * Hence roll back the changes done in exynos_power_down function.
>> +       */
>> +       __raw_writel(EXYNOS_CORE_LOCAL_PWR_EN,
>> +                       EXYNOS_ARM_CORE_CONFIGURATION(cpunr));
>
>
> Why don't you use the functions defined in the
>
> patch 5/5 arm: exynos: Add MCPM call-back functions

In exynos_core_power_control it powerup the alreay powered down core.
But here i need to simply set this value as core never powered down.

>
> exynos_core_power_control() ?
>
>
>> +       set_cr(get_cr() | CR_C);
>> +       enable_coherency();
>> +}
>> +
>>   static const struct mcpm_platform_ops exynos_power_ops = {
>>         .power_up               = exynos_power_up,
>>         .power_down             = exynos_power_down,
>>         .power_down_finish      = exynos_power_down_finish,
>> +       .suspend                = exynos_suspend,
>> +       .powered_up             = exynos_powered_up,
>>   };
>>
>>   static void __init exynos_mcpm_usage_count_init(void)
>>
>
>
> --
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>
Chander Kashyap April 23, 2014, 9:25 a.m. | #3
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.

This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle driver.

Tested on SMDK5420.

This patch set depends on:
	1. [PATCH 0/5] MCPM backend for Exynos5420
	   http://www.spinics.net/lists/arm-kernel/msg321666.html

	2. [PATCH v4] arm: exynos: generalize power register address calculation
	   http://www.spinics.net/lists/arm-kernel/msg324024.html
		
Changelog is in respective patches.
Chander Kashyap (4):
  cpuidle: config: Add SOC_EXYNOS5420 entry to select
    cpuidle-big-little driver
  driver: cpuidle: cpuidle-big-little: init driver for Exynos5420
  exynos: cpuidle: do not allow cpuidle registration for Exynos5420
  mcpm: exynos: populate suspend and powered_up callbacks

 arch/arm/mach-exynos/cpuidle.c       |    3 ++
 arch/arm/mach-exynos/mcpm-exynos.c   |   53 ++++++++++++++++++++++++++++++++++
 drivers/cpuidle/Kconfig.arm          |    2 +-
 drivers/cpuidle/cpuidle-big_little.c |    3 +-
 4 files changed, 59 insertions(+), 2 deletions(-)
Rafael J. Wysocki April 23, 2014, 10:18 a.m. | #4
On Wednesday, April 23, 2014 02:55:50 PM Chander Kashyap wrote:
> Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
> 
> This patchset adds cpuidle support for Exynos5420 SoC based on
> generic big.little cpuidle driver.
> 
> Tested on SMDK5420.
> 
> This patch set depends on:
> 	1. [PATCH 0/5] MCPM backend for Exynos5420
> 	   http://www.spinics.net/lists/arm-kernel/msg321666.html
> 
> 	2. [PATCH v4] arm: exynos: generalize power register address calculation
> 	   http://www.spinics.net/lists/arm-kernel/msg324024.html
> 		
> Changelog is in respective patches.
> Chander Kashyap (4):
>   cpuidle: config: Add SOC_EXYNOS5420 entry to select
>     cpuidle-big-little driver
>   driver: cpuidle: cpuidle-big-little: init driver for Exynos5420
>   exynos: cpuidle: do not allow cpuidle registration for Exynos5420
>   mcpm: exynos: populate suspend and powered_up callbacks
> 
>  arch/arm/mach-exynos/cpuidle.c       |    3 ++
>  arch/arm/mach-exynos/mcpm-exynos.c   |   53 ++++++++++++++++++++++++++++++++++
>  drivers/cpuidle/Kconfig.arm          |    2 +-
>  drivers/cpuidle/cpuidle-big_little.c |    3 +-
>  4 files changed, 59 insertions(+), 2 deletions(-)

I'm assuming that the Exynos maintainers will take care of this, correct?
Kukjin Kim April 23, 2014, 3:42 p.m. | #5
On 04/23/14 19:18, Rafael J. Wysocki wrote:
> On Wednesday, April 23, 2014 02:55:50 PM Chander Kashyap wrote:
>> Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.
>>
>> This patchset adds cpuidle support for Exynos5420 SoC based on
>> generic big.little cpuidle driver.
>>
>> Tested on SMDK5420.
>>
>> This patch set depends on:
>> 	1. [PATCH 0/5] MCPM backend for Exynos5420
>> 	   http://www.spinics.net/lists/arm-kernel/msg321666.html
>>
>> 	2. [PATCH v4] arm: exynos: generalize power register address calculation
>> 	   http://www.spinics.net/lists/arm-kernel/msg324024.html
>> 		
>> Changelog is in respective patches.
>> Chander Kashyap (4):
>>    cpuidle: config: Add SOC_EXYNOS5420 entry to select
>>      cpuidle-big-little driver
>>    driver: cpuidle: cpuidle-big-little: init driver for Exynos5420
>>    exynos: cpuidle: do not allow cpuidle registration for Exynos5420
>>    mcpm: exynos: populate suspend and powered_up callbacks
>>
>>   arch/arm/mach-exynos/cpuidle.c       |    3 ++
>>   arch/arm/mach-exynos/mcpm-exynos.c   |   53 ++++++++++++++++++++++++++++++++++
>>   drivers/cpuidle/Kconfig.arm          |    2 +-
>>   drivers/cpuidle/cpuidle-big_little.c |    3 +-
>>   4 files changed, 59 insertions(+), 2 deletions(-)
>
> I'm assuming that the Exynos maintainers will take care of this, correct?
>

Yeah, I will if you have any objection :-)

BTW, I need to look at the dependent patches.

- Kukjin
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Chander Kashyap May 5, 2014, 8:27 a.m. | #6
Exynos5420 is a big-little Soc from Samsung. It has 4 A15 and 4 A7 cores.

This patchset adds cpuidle support for Exynos5420 SoC based on
generic big.little cpuidle driver.

Tested on SMDK5420.

This patch set depends on:
	1. [PATCH 0/5] MCPM backend for Exynos5420
	   http://www.spinics.net/lists/arm-kernel/msg327923.html

	2. [PATCH] arm: exynos: add generic function to calculate cpu number
	   http://www.spinics.net/lists/linux-samsung-soc/msg29446.html
	   http://www.spinics.net/lists/arm-kernel/msg324024.html
		
Changelog is in respective patches.
Chander Kashyap (5):
  driver: cpuidle-big-little: add of_device_id structure
  cpuidle: config: Add ARCH_EXYNOS entry to select cpuidle-big-little
    driver
  driver: cpuidle: cpuidle-big-little: init driver for Exynos5420
  exynos: cpuidle: do not allow cpuidle registration for Exynos5420
  mcpm: exynos: populate suspend and powered_up callbacks

 arch/arm/mach-exynos/cpuidle.c       |    3 +++
 arch/arm/mach-exynos/mcpm-exynos.c   |   34 ++++++++++++++++++++++++++++++++++
 drivers/cpuidle/Kconfig.arm          |    2 +-
 drivers/cpuidle/cpuidle-big_little.c |   12 +++++++++++-
 4 files changed, 49 insertions(+), 2 deletions(-)

Patch

diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index 46d4968..16af0bd 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -318,10 +318,63 @@  static int exynos_power_down_finish(unsigned int cpu, unsigned int cluster)
 	return 0; /* success: the CPU is halted */
 }
 
+static void enable_coherency(void)
+{
+	unsigned long v, u;
+
+	asm volatile(
+		"mrc	p15, 0, %0, c1, c0, 1\n"
+		"orr	%0, %0, %2\n"
+		"ldr	%1, [%3]\n"
+		"and	%1, %1, #0\n"
+		"orr	%0, %0, %1\n"
+		"mcr	p15, 0, %0, c1, c0, 1\n"
+		: "=&r" (v), "=&r" (u)
+		: "Ir" (0x40), "Ir" (S5P_INFORM0)
+		: "cc");
+}
+
+void exynos_powered_up(void)
+{
+	unsigned int mpidr, cpu, cluster;
+
+	mpidr = read_cpuid_mpidr();
+	cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
+	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
+
+	arch_spin_lock(&bl_lock);
+	if (cpu_use_count[cpu][cluster] == 0)
+		cpu_use_count[cpu][cluster] = 1;
+	arch_spin_unlock(&bl_lock);
+}
+
+static void exynos_suspend(u64 residency)
+{
+	unsigned int mpidr, cpunr;
+
+	mpidr = read_cpuid_mpidr();
+	cpunr = enynos_pmu_cpunr(mpidr);
+
+	__raw_writel(virt_to_phys(mcpm_entry_point), REG_ENTRY_ADDR);
+
+	exynos_power_down();
+
+	/*
+	 * Execution reaches here only if cpu did not power down.
+	 * Hence roll back the changes done in exynos_power_down function.
+	*/
+	__raw_writel(EXYNOS_CORE_LOCAL_PWR_EN,
+			EXYNOS_ARM_CORE_CONFIGURATION(cpunr));
+	set_cr(get_cr() | CR_C);
+	enable_coherency();
+}
+
 static const struct mcpm_platform_ops exynos_power_ops = {
 	.power_up		= exynos_power_up,
 	.power_down		= exynos_power_down,
 	.power_down_finish	= exynos_power_down_finish,
+	.suspend		= exynos_suspend,
+	.powered_up		= exynos_powered_up,
 };
 
 static void __init exynos_mcpm_usage_count_init(void)