diff mbox

[Xen-devel,v5,01/14] xen/arm: Introduce flush_tlb_domain

Message ID 1399996230-18201-2-git-send-email-julien.grall@linaro.org
State Accepted, archived
Headers show

Commit Message

Julien Grall May 13, 2014, 3:50 p.m. UTC
The pattern p2m_load_VTTBR(d) -> flush_tlb -> p2m_load_VTTBR(current->domain)
is used in few places.

Replace this usage by flush_tlb_domain which will take care of this pattern.
This will help to the lisibility of apply_p2m_changes which begin to be big.

Signed-off-by: Julien Grall <julien.grall@linaro.org>

---
    Changes in v5:
        - Patch added
---
 xen/arch/arm/p2m.c             |   35 +++++++++++++++++------------------
 xen/include/asm-arm/flushtlb.h |    3 +++
 2 files changed, 20 insertions(+), 18 deletions(-)

Comments

Ian Campbell May 14, 2014, 1:28 p.m. UTC | #1
On Tue, 2014-05-13 at 16:50 +0100, Julien Grall wrote:
> The pattern p2m_load_VTTBR(d) -> flush_tlb -> p2m_load_VTTBR(current->domain)
> is used in few places.
> 
> Replace this usage by flush_tlb_domain which will take care of this pattern.
> This will help to the lisibility of apply_p2m_changes which begin to be big.

"lisibility"? Did you mean to type "visibility"? I think the word you
really wanted was "readability".

> diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h
> index 329fbb4..5722c67 100644
> --- a/xen/include/asm-arm/flushtlb.h
> +++ b/xen/include/asm-arm/flushtlb.h
> @@ -25,6 +25,9 @@ do {                                                                    \
>  /* Flush specified CPUs' TLBs */
>  void flush_tlb_mask(const cpumask_t *mask);
>  
> +/* Flush CPU's TLBs for the speficied domain */

"Specified"

Other than those two nits:
Acked-by: Ian Campbell <ian.campbell@citrix.com>

If you can confirm what you meant by "lisibility" I can probably fixup
both on commit.

> +void flush_tlb_domain(struct domain *d);
> +
>  #endif /* __ASM_ARM_FLUSHTLB_H__ */
>  /*
>   * Local variables:
Julien Grall May 14, 2014, 1:29 p.m. UTC | #2
On 05/14/2014 02:28 PM, Ian Campbell wrote:
> On Tue, 2014-05-13 at 16:50 +0100, Julien Grall wrote:
>> The pattern p2m_load_VTTBR(d) -> flush_tlb -> p2m_load_VTTBR(current->domain)
>> is used in few places.
>>
>> Replace this usage by flush_tlb_domain which will take care of this pattern.
>> This will help to the lisibility of apply_p2m_changes which begin to be big.
> 
> "lisibility"? Did you mean to type "visibility"? I think the word you
> really wanted was "readability".

I meant readability. It was a quick & bad translation from French.

>> diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h
>> index 329fbb4..5722c67 100644
>> --- a/xen/include/asm-arm/flushtlb.h
>> +++ b/xen/include/asm-arm/flushtlb.h
>> @@ -25,6 +25,9 @@ do {                                                                    \
>>  /* Flush specified CPUs' TLBs */
>>  void flush_tlb_mask(const cpumask_t *mask);
>>  
>> +/* Flush CPU's TLBs for the speficied domain */
> 
> "Specified"
> 
> Other than those two nits:
> Acked-by: Ian Campbell <ian.campbell@citrix.com>

Thanks!
diff mbox

Patch

diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 603c097..61450cf 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -72,6 +72,21 @@  void p2m_restore_state(struct vcpu *n)
     isb();
 }
 
+void flush_tlb_domain(struct domain *d)
+{
+    /* Update the VTTBR if necessary with the domain d. In this case,
+     * it's only necessary to flush TLBs on every CPUs with the current VMID
+     * (our domain).
+     */
+    if ( d != current->domain )
+        p2m_load_VTTBR(d);
+
+    flush_tlb();
+
+    if ( d != current->domain )
+        p2m_load_VTTBR(current->domain);
+}
+
 static int p2m_first_level_index(paddr_t addr)
 {
     /*
@@ -450,19 +465,7 @@  static int apply_p2m_changes(struct domain *d,
     }
 
     if ( flush )
-    {
-        /* Update the VTTBR if necessary with the domain where mappings
-         * are created. In this case it's only necessary to flush TLBs
-         * on every CPUs with the current VMID (our domain).
-         */
-        if ( d != current->domain )
-            p2m_load_VTTBR(d);
-
-        flush_tlb();
-
-        if ( d != current->domain )
-            p2m_load_VTTBR(current->domain);
-    }
+        flush_tlb_domain(d);
 
     if ( op == ALLOCATE || op == INSERT )
     {
@@ -550,14 +553,10 @@  int p2m_alloc_table(struct domain *d)
     d->arch.vttbr = page_to_maddr(p2m->first_level)
         | ((uint64_t)p2m->vmid&0xff)<<48;
 
-    p2m_load_VTTBR(d);
-
     /* Make sure that all TLBs corresponding to the new VMID are flushed
      * before using it
      */
-    flush_tlb();
-
-    p2m_load_VTTBR(current->domain);
+    flush_tlb_domain(d);
 
     spin_unlock(&p2m->lock);
 
diff --git a/xen/include/asm-arm/flushtlb.h b/xen/include/asm-arm/flushtlb.h
index 329fbb4..5722c67 100644
--- a/xen/include/asm-arm/flushtlb.h
+++ b/xen/include/asm-arm/flushtlb.h
@@ -25,6 +25,9 @@  do {                                                                    \
 /* Flush specified CPUs' TLBs */
 void flush_tlb_mask(const cpumask_t *mask);
 
+/* Flush CPU's TLBs for the speficied domain */
+void flush_tlb_domain(struct domain *d);
+
 #endif /* __ASM_ARM_FLUSHTLB_H__ */
 /*
  * Local variables: