| Message ID | 20201026105504.4023620-7-philmd@redhat.com |
|---|---|
| State | New |
| Headers | show |
| Series | util/vfio-helpers: Allow using multiple MSIX IRQs | expand |
Hi Philippe, On 10/26/20 11:54 AM, Philippe Mathieu-Daudé wrote: > We sometime get kernel panic with some devices on Aarch64 > hosts. Alex Williamson suggests it might be broken PCIe > root complex. Add trace event to record the latest I/O > access before crashing. In case, assert our accesses are > aligned. > > Reviewed-by: Fam Zheng <fam@euphon.net> > Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> > Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> > --- > util/vfio-helpers.c | 8 ++++++++ > util/trace-events | 2 ++ > 2 files changed, 10 insertions(+) > > diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c > index 14a549510fe..1d4efafcaa4 100644 > --- a/util/vfio-helpers.c > +++ b/util/vfio-helpers.c > @@ -227,6 +227,10 @@ static int qemu_vfio_pci_read_config(QEMUVFIOState *s, void *buf, > { > int ret; > > + trace_qemu_vfio_pci_read_config(buf, ofs, size, > + s->config_region_info.offset, > + s->config_region_info.size); > + assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); > do { > ret = pread(s->device, buf, size, s->config_region_info.offset + ofs); > } while (ret == -1 && errno == EINTR); > @@ -237,6 +241,10 @@ static int qemu_vfio_pci_write_config(QEMUVFIOState *s, void *buf, int size, int > { > int ret; > > + trace_qemu_vfio_pci_write_config(buf, ofs, size, > + s->config_region_info.offset, > + s->config_region_info.size); > + assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); > do { > ret = pwrite(s->device, buf, size, s->config_region_info.offset + ofs); > } while (ret == -1 && errno == EINTR); > diff --git a/util/trace-events b/util/trace-events > index 24c31803b01..c048f85f828 100644 > --- a/util/trace-events > +++ b/util/trace-events > @@ -85,3 +85,5 @@ qemu_vfio_new_mapping(void *s, void *host, size_t size, int index, uint64_t iova > qemu_vfio_do_mapping(void *s, void *host, size_t size, uint64_t iova) "s %p host %p size 0x%zx iova 0x%"PRIx64 > qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *iova) "s %p host %p size 0x%zx temporary %d iova %p" > qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" > +qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "read cfg ptr %p ofs 0x%x size %d (region ofs 0x%"PRIx64" size %"PRId64")" > +qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size %d (region ofs 0x%"PRIx64" size %"PRId64")" I would personally use 0x%PRIx64 for the size too as generally done in hw/vfio/trace-events . Thanks Eric >
diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c index 14a549510fe..1d4efafcaa4 100644 --- a/util/vfio-helpers.c +++ b/util/vfio-helpers.c @@ -227,6 +227,10 @@ static int qemu_vfio_pci_read_config(QEMUVFIOState *s, void *buf, { int ret; + trace_qemu_vfio_pci_read_config(buf, ofs, size, + s->config_region_info.offset, + s->config_region_info.size); + assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); do { ret = pread(s->device, buf, size, s->config_region_info.offset + ofs); } while (ret == -1 && errno == EINTR); @@ -237,6 +241,10 @@ static int qemu_vfio_pci_write_config(QEMUVFIOState *s, void *buf, int size, int { int ret; + trace_qemu_vfio_pci_write_config(buf, ofs, size, + s->config_region_info.offset, + s->config_region_info.size); + assert(QEMU_IS_ALIGNED(s->config_region_info.offset + ofs, size)); do { ret = pwrite(s->device, buf, size, s->config_region_info.offset + ofs); } while (ret == -1 && errno == EINTR); diff --git a/util/trace-events b/util/trace-events index 24c31803b01..c048f85f828 100644 --- a/util/trace-events +++ b/util/trace-events @@ -85,3 +85,5 @@ qemu_vfio_new_mapping(void *s, void *host, size_t size, int index, uint64_t iova qemu_vfio_do_mapping(void *s, void *host, size_t size, uint64_t iova) "s %p host %p size 0x%zx iova 0x%"PRIx64 qemu_vfio_dma_map(void *s, void *host, size_t size, bool temporary, uint64_t *iova) "s %p host %p size 0x%zx temporary %d iova %p" qemu_vfio_dma_unmap(void *s, void *host) "s %p host %p" +qemu_vfio_pci_read_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "read cfg ptr %p ofs 0x%x size %d (region ofs 0x%"PRIx64" size %"PRId64")" +qemu_vfio_pci_write_config(void *buf, int ofs, int size, uint64_t region_ofs, uint64_t region_size) "write cfg ptr %p ofs 0x%x size %d (region ofs 0x%"PRIx64" size %"PRId64")"