| Message ID | 20201011193229.3210774-2-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show
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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id a17sm21215068wra.29.2020.10.11.12.32.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Oct 2020 12:32:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org> To: qemu-devel@nongnu.org Subject: [PATCH 01/10] hw/isa: Introduce IsaIrqNumber enum Date: Sun, 11 Oct 2020 21:32:20 +0200 Message-Id: <20201011193229.3210774-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201011193229.3210774-1-f4bug@amsat.org> References: <20201011193229.3210774-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::441; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x441.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. 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Tsirkin" <mst@redhat.com>, Jason Wang <jasowang@redhat.com>, Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>, qemu-block@nongnu.org, Stefan Berger <stefanb@linux.vnet.ibm.com>, qemu-trivial@nongnu.org, =?utf-8?q?Herv=C3=A9_Poussineau?= <hpoussin@reactos.org>, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= <marcandre.lureau@redhat.com>, Artyom Tarasenko <atar4qemu@gmail.com>, Laurent Vivier <lvivier@redhat.com>, Thomas Huth <thuth@redhat.com>, Eduardo Habkost <ehabkost@redhat.com>, Corey Minyard <minyard@acm.org>, Paolo Bonzini <pbonzini@redhat.com>, John Snow <jsnow@redhat.com>, Richard Henderson <rth@twiddle.net>, Kevin Wolf <kwolf@redhat.com>, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org>, Max Reitz <mreitz@redhat.com>, qemu-ppc@nongnu.org, Igor Mammedov <imammedo@redhat.com>, Aurelien Jarno <aurelien@aurel32.net> Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org> |
| Series |
hw/isa: Introduce definitions for default IRQ values
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expand
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diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h index ddaae89a853..2a052ffa025 100644 --- a/include/hw/isa/isa.h +++ b/include/hw/isa/isa.h @@ -8,7 +8,9 @@ #include "hw/qdev-core.h" #include "qom/object.h" -#define ISA_NUM_IRQS 16 +enum IsaIrqNumber { + ISA_NUM_IRQS = 16 +}; #define TYPE_ISA_DEVICE "isa-device" OBJECT_DECLARE_TYPE(ISADevice, ISADeviceClass, ISA_DEVICE)
We are going to list all default ISA IRQs. As all the definitions are related, introduce the IsaIrqNumber type to enumerate them. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- include/hw/isa/isa.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)