diff mbox

[v2,1/6] target-arm: don't set cpu do_interrupt handler for user mode emulation

Message ID 1400812209-26743-2-git-send-email-robherring2@gmail.com
State New
Headers show

Commit Message

Rob Herring May 23, 2014, 2:30 a.m. UTC
From: Rob Herring <rob.herring@linaro.org>

In preparation to add system mode only calls to
aarch64_cpu_do_interrupt, compile it for system mode only and don't set
the do_interrupt callback for user mode emulation. User mode emulation
should never get interrupts and thus should not have a exception handler
function. Do the same change from AArch32 to keep them aligned.

Signed-off-by: Rob Herring <rob.herring@linaro.org>
---
v2:
- Only set .do_interrupt function for system emulation on A32 and A64.

 target-arm/cpu.c        | 2 +-
 target-arm/cpu64.c      | 2 ++
 target-arm/helper-a64.c | 3 +++
 target-arm/helper.c     | 5 -----
 4 files changed, 6 insertions(+), 6 deletions(-)

--
1.9.1

Comments

Peter Maydell June 3, 2014, 3:02 p.m. UTC | #1
On 23 May 2014 03:30, Rob Herring <robherring2@gmail.com> wrote:
> From: Rob Herring <rob.herring@linaro.org>
>
> In preparation to add system mode only calls to
> aarch64_cpu_do_interrupt, compile it for system mode only and don't set
> the do_interrupt callback for user mode emulation. User mode emulation
> should never get interrupts and thus should not have a exception handler
> function. Do the same change from AArch32 to keep them aligned.
>
> Signed-off-by: Rob Herring <rob.herring@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM
diff mbox

Patch

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 589f34d..f46b375 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -1038,7 +1038,6 @@  static void arm_cpu_class_init(ObjectClass *oc, void *data)

     cc->class_by_name = arm_cpu_class_by_name;
     cc->has_work = arm_cpu_has_work;
-    cc->do_interrupt = arm_cpu_do_interrupt;
     cc->dump_state = arm_cpu_dump_state;
     cc->set_pc = arm_cpu_set_pc;
     cc->gdb_read_register = arm_cpu_gdb_read_register;
@@ -1046,6 +1045,7 @@  static void arm_cpu_class_init(ObjectClass *oc, void *data)
 #ifdef CONFIG_USER_ONLY
     cc->handle_mmu_fault = arm_cpu_handle_mmu_fault;
 #else
+    cc->do_interrupt = arm_cpu_do_interrupt;
     cc->get_phys_page_debug = arm_cpu_get_phys_page_debug;
     cc->vmsd = &vmstate_arm_cpu;
 #endif
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index 8daa622..b155579 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -187,7 +187,9 @@  static void aarch64_cpu_class_init(ObjectClass *oc, void *data)
 {
     CPUClass *cc = CPU_CLASS(oc);

+#if !defined(CONFIG_USER_ONLY)
     cc->do_interrupt = aarch64_cpu_do_interrupt;
+#endif
     cc->set_pc = aarch64_cpu_set_pc;
     cc->gdb_read_register = aarch64_cpu_gdb_read_register;
     cc->gdb_write_register = aarch64_cpu_gdb_write_register;
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index bf921cc..84411b4 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -438,6 +438,8 @@  float32 HELPER(fcvtx_f64_to_f32)(float64 a, CPUARMState *env)
     return r;
 }

+#if !defined(CONFIG_USER_ONLY)
+
 /* Handle a CPU exception.  */
 void aarch64_cpu_do_interrupt(CPUState *cs)
 {
@@ -512,3 +514,4 @@  void aarch64_cpu_do_interrupt(CPUState *cs)
     env->pc = addr;
     cs->interrupt_request |= CPU_INTERRUPT_EXITTB;
 }
+#endif
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 417161e..1307473 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -3004,11 +3004,6 @@  uint32_t HELPER(rbit)(uint32_t x)

 #if defined(CONFIG_USER_ONLY)

-void arm_cpu_do_interrupt(CPUState *cs)
-{
-    cs->exception_index = -1;
-}
-
 int arm_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw,
                              int mmu_idx)
 {