From patchwork Thu May 29 20:08:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Larry Bassel X-Patchwork-Id: 31147 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pa0-f70.google.com (mail-pa0-f70.google.com [209.85.220.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 61CFD20068 for ; Thu, 29 May 2014 20:09:40 +0000 (UTC) Received: by mail-pa0-f70.google.com with SMTP id kp14sf3801395pab.1 for ; Thu, 29 May 2014 13:09:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=orO4S8vDcenm0+9CPfZKpzVHVDzJRYb5YLYM0m+ZKec=; b=fGdVlrIQD67JXZIIVHDTJGyv0rPZj8Mj5EBD5wJ+2PcEV3X3WNTN4adupZKHMXf9Um 9rncXjbvVtCuUHcCebJktgGI+b1gTRJtovGuil45bdqW9O5+gnD8BTs4XLK36Meji9IA pOTcVubWN83rlglyLm5QhEEf3Ju2fd1XjKjcD6/3IhQvBTtIZ1U4rwbdIL/nkl3A5n72 oZOARbJ0+7+/siXJ2O4xvSp5H213StlY6a23Nc+aLw7M1EkkcqE7D5XiwBmwO7mg8CFU zPRXbsbM28y2MkVFbkFpLB8CTmJ+aEfKzE6kdjAk6nsDB918XkrQlokwJoENVf+mdAe0 TfKg== X-Gm-Message-State: ALoCoQnor8nC1VWkzcSin56G5CdC4XIfAs+GcKk4vJ8pM5URWTqxgmreLlpt2B6aN5Pxx/0s37Su X-Received: by 10.68.253.66 with SMTP id zy2mr3699833pbc.1.1401394179513; Thu, 29 May 2014 13:09:39 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.95.232 with SMTP id i95ls756073qge.7.gmail; Thu, 29 May 2014 13:09:39 -0700 (PDT) X-Received: by 10.220.50.18 with SMTP id x18mr3518568vcf.66.1401394179330; Thu, 29 May 2014 13:09:39 -0700 (PDT) Received: from mail-ve0-f181.google.com (mail-ve0-f181.google.com [209.85.128.181]) by mx.google.com with ESMTPS id na9si1425662vcb.64.2014.05.29.13.09.39 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 29 May 2014 13:09:39 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.181 as permitted sender) client-ip=209.85.128.181; Received: by mail-ve0-f181.google.com with SMTP id pa12so996492veb.40 for ; Thu, 29 May 2014 13:09:39 -0700 (PDT) X-Received: by 10.52.25.130 with SMTP id c2mr2974434vdg.27.1401394179228; Thu, 29 May 2014 13:09:39 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp56118vcb; Thu, 29 May 2014 13:09:38 -0700 (PDT) X-Received: by 10.66.189.169 with SMTP id gj9mr11515335pac.149.1401394177807; Thu, 29 May 2014 13:09:37 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id dn8si2369904pac.129.2014.05.29.13.09.37 for ; Thu, 29 May 2014 13:09:37 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932572AbaE2UJX (ORCPT + 27 others); Thu, 29 May 2014 16:09:23 -0400 Received: from mail-ob0-f171.google.com ([209.85.214.171]:52566 "EHLO mail-ob0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756205AbaE2UJO (ORCPT ); Thu, 29 May 2014 16:09:14 -0400 Received: by mail-ob0-f171.google.com with SMTP id wn1so865064obc.2 for ; Thu, 29 May 2014 13:09:13 -0700 (PDT) X-Received: by 10.60.146.167 with SMTP id td7mr11547482oeb.6.1401394153772; Thu, 29 May 2014 13:09:13 -0700 (PDT) Received: from localhost.localdomain (adsl-71-136-229-5.dsl.sndg02.pacbell.net. [71.136.229.5]) by mx.google.com with ESMTPSA id ub1sm5389275oeb.9.2014.05.29.13.09.12 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 29 May 2014 13:09:12 -0700 (PDT) From: Larry Bassel To: catalin.marinas@arm.com, will.deacon@arm.com Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linaro-kernel@lists.linaro.org, khilman@linaro.org, Larry Bassel Subject: [PATCH v6 2/2] arm64: enable context tracking Date: Thu, 29 May 2014 13:08:59 -0700 Message-Id: <1401394139-23469-3-git-send-email-larry.bassel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1401394139-23469-1-git-send-email-larry.bassel@linaro.org> References: <1401394139-23469-1-git-send-email-larry.bassel@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: larry.bassel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.181 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Make calls to ct_user_enter when the kernel is exited and ct_user_exit when the kernel is entered (in el0_da, el0_ia, el0_svc, el0_irq and all of the "error" paths). These macros expand to function calls which will only work properly if el0_sync and related code has been rearranged (in a previous patch of this series). The calls to ct_user_exit are made after hw debugging has been enabled (enable_dbg_and_irq). The call to ct_user_enter is made at the beginning of the kernel_exit macro. This patch is based on earlier work by Kevin Hilman. Save/restore optimizations were also done by Kevin. Signed-off-by: Kevin Hilman Signed-off-by: Larry Bassel --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/thread_info.h | 4 ++++ arch/arm64/kernel/entry.S | 39 +++++++++++++++++++++++++++++++++++- 3 files changed, 43 insertions(+), 1 deletion(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index e759af5..ef18ae5 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -55,6 +55,7 @@ config ARM64 select RTC_LIB select SPARSE_IRQ select SYSCTL_EXCEPTION_TRACE + select HAVE_CONTEXT_TRACKING help ARM 64-bit (AArch64) Linux support. diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h index 720e70b..8363f34 100644 --- a/arch/arm64/include/asm/thread_info.h +++ b/arch/arm64/include/asm/thread_info.h @@ -100,6 +100,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_SIGPENDING 0 #define TIF_NEED_RESCHED 1 #define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ +#define TIF_NOHZ 7 #define TIF_SYSCALL_TRACE 8 #define TIF_POLLING_NRFLAG 16 #define TIF_MEMDIE 18 /* is terminating due to OOM killer */ @@ -113,9 +114,12 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) #define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) #define _TIF_32BIT (1 << TIF_32BIT) +#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) +#define _TIF_NOHZ (1 << TIF_NOHZ) #define _TIF_WORK_MASK (_TIF_NEED_RESCHED | _TIF_SIGPENDING | \ _TIF_NOTIFY_RESUME) +#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_NOHZ) #endif /* __KERNEL__ */ #endif /* __ASM_THREAD_INFO_H */ diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index b0101b9..3c484e2 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -30,6 +30,32 @@ #include /* + * Context tracking subsystem. Used to instrument transitions + * between user and kernel mode. + */ + .macro ct_user_exit, restore = 0 +#ifdef CONFIG_CONTEXT_TRACKING + bl context_tracking_user_exit + .if \restore == 1 + /* + * Save/restore needed during syscalls. Restore syscall arguments from + * the values already saved on stack during kernel_entry. + */ + ldp x0, x1, [sp] + ldp x2, x3, [sp, #S_X2] + ldp x4, x5, [sp, #S_X4] + ldp x6, x7, [sp, #S_X6] + .endif +#endif + .endm + + .macro ct_user_enter +#ifdef CONFIG_CONTEXT_TRACKING + bl context_tracking_user_enter +#endif + .endm + +/* * Bad Abort numbers *----------------- */ @@ -91,6 +117,7 @@ .macro kernel_exit, el, ret = 0 ldp x21, x22, [sp, #S_PC] // load ELR, SPSR .if \el == 0 + ct_user_enter ldr x23, [sp, #S_SP] // load return stack pointer .endif .if \ret @@ -318,6 +345,7 @@ el1_irq: bl trace_hardirqs_off #endif + ct_user_exit irq_handler #ifdef CONFIG_PREEMPT @@ -427,6 +455,7 @@ el0_da: mrs x26, far_el1 // enable interrupts before calling the main handler enable_dbg_and_irq + ct_user_exit bic x0, x26, #(0xff << 56) mov x1, x25 mov x2, sp @@ -439,6 +468,7 @@ el0_ia: mrs x26, far_el1 // enable interrupts before calling the main handler enable_dbg_and_irq + ct_user_exit mov x0, x26 orr x1, x25, #1 << 24 // use reserved ISS bit for instruction aborts mov x2, sp @@ -449,6 +479,7 @@ el0_fpsimd_acc: * Floating Point or Advanced SIMD access */ enable_dbg + ct_user_exit mov x0, x25 mov x1, sp adr lr, ret_to_user @@ -458,6 +489,7 @@ el0_fpsimd_exc: * Floating Point or Advanced SIMD exception */ enable_dbg + ct_user_exit mov x0, x25 mov x1, sp adr lr, ret_to_user @@ -480,6 +512,7 @@ el0_undef: */ // enable interrupts before calling the main handler enable_dbg_and_irq + ct_user_exit mov x0, sp adr lr, ret_to_user b do_undefinstr @@ -493,9 +526,11 @@ el0_dbg: mov x2, sp bl do_debug_exception enable_dbg + ct_user_exit b ret_to_user el0_inv: enable_dbg + ct_user_exit mov x0, sp mov x1, #BAD_SYNC mrs x2, esr_el1 @@ -616,9 +651,11 @@ el0_svc: el0_svc_naked: // compat entry point stp x0, scno, [sp, #S_ORIG_X0] // save the original x0 and syscall number enable_dbg_and_irq + ct_user_exit 1 ldr x16, [tsk, #TI_FLAGS] // check for syscall tracing - tbnz x16, #TIF_SYSCALL_TRACE, __sys_trace // are we tracing syscalls? + and x16, x16, #_TIF_SYSCALL_WORK // are we tracing syscalls? + cbnz x16, __sys_trace adr lr, ret_fast_syscall // return address cmp scno, sc_nr // check upper syscall limit b.hs ni_sys