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[3/4] ARM 64 bit sync atomic operations [V2]

Message ID 20110726090156.GD6925@davesworkthinkpad
State Superseded
Headers show

Commit Message

Dr. David Alan Gilbert July 26, 2011, 9:01 a.m. UTC
Micahel K. Edwards points out in PR/48126 that the sync is in the wrong place
      relative to the branch target of the compare, since the load could float
      up beyond the ldrex.
    
        gcc/
    	* config/arm/arm.c (arm_output_sync_loop): Move label before barier,
    						   fixes PR/48126

Comments

Ramana Radhakrishnan Aug. 17, 2011, 10:16 a.m. UTC | #1
On 26 July 2011 10:01, Dr. David Alan Gilbert <david.gilbert@linaro.org> wrote:
>      Micahel K. Edwards points out in PR/48126 that the sync is in the wrong place
>      relative to the branch target of the compare, since the load could float
>      up beyond the ldrex.
>
>        gcc/
>        * config/arm/arm.c (arm_output_sync_loop): Move label before barier,
>                                                   fixes PR/48126

s/barier/barrier.

This is OK for trunk and appropriate release branches after due testing.

Next time note that the Changelog entry should read - The PR number
really shouldn't be a part
of the actual log.

PR target/48126

* config/arm/arm.c (arm_output_sync_loop): Move label before barrier.



with appropriate formatting.


Thanks,
Ramana
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Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 28be078..cee3471 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -23780,8 +23780,11 @@  arm_output_sync_loop (emit_f emit,
 	}
     }
 
-  arm_process_output_memory_barrier (emit, NULL);
+  /* Note: label is before barrier so that in cmp failure case we still get
+     a barrier to stop subsequent loads floating upwards past the ldrex
+     pr/48126 */
   arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
+  arm_process_output_memory_barrier (emit, NULL);
 }
 
 static rtx