[2/2] usb: phy: omap_usb_phy: implement usb_phy_power() for AM437x

Message ID 1404964963-6614-2-git-send-email-balbi@ti.com
State New
Headers show

Commit Message

Felipe Balbi July 10, 2014, 4:02 a.m.
Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---
 arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |  5 +++++
 drivers/usb/phy/omap_usb_phy.c                     | 11 ++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)

Comments

Felipe Balbi July 10, 2014, 4:06 a.m. | #1
On Wed, Jul 09, 2014 at 11:02:43PM -0500, Felipe Balbi wrote:
> Newer AM437x silicon requires us to explicitly power up
> the USB2 PHY. By implementing usb_phy_power() we can
> achieve that.
> 
> Signed-off-by: Felipe Balbi <balbi@ti.com>
> ---

the only change here is the use of {set,clr}bits_le32()

>  arch/arm/include/asm/arch-am33xx/hardware_am43xx.h |  5 +++++
>  drivers/usb/phy/omap_usb_phy.c                     | 11 ++++++++++-
>  2 files changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
> index b470319..efdecf4 100644
> --- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
> +++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
> @@ -43,6 +43,11 @@
>  #define VTP0_CTRL_ADDR			0x44E10E0C
>  #define VTP1_CTRL_ADDR			0x48140E10
>  
> +/* USB CTRL Base Address */
> +#define USB1_CTRL			0x44e10628
> +#define USB1_CTRL_CM_PWRDN		BIT(0)
> +#define USB1_CTRL_OTG_PWRDN		BIT(1)
> +
>  /* DDR Base address */
>  #define DDR_PHY_CMD_ADDR		0x44E12000
>  #define DDR_PHY_DATA_ADDR		0x44E120C8
> diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
> index af46db2..53778b3 100644
> --- a/drivers/usb/phy/omap_usb_phy.c
> +++ b/drivers/usb/phy/omap_usb_phy.c
> @@ -222,7 +222,16 @@ static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
>  
>  void usb_phy_power(int on)
>  {
> -	return;
> +	/*
> +	 * In order to get USB working on newer AM43xx silicon, we must
> +	 * explicitly power the USB PHYs.
> +	 */
> +	if (on)
> +		clrbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
> +				USB1_CTRL_OTG_PWRDN);
> +	else
> +		setbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
> +				USB1_CTRL_OTG_PWRDN);
>  }
>  #endif /* CONFIG_AM437X_USB2PHY2_HOST */
>  
> -- 
> 2.0.0.390.gcb682f8
>
Marek Vasut July 10, 2014, 7:44 a.m. | #2
On Thursday, July 10, 2014 at 06:06:06 AM, Felipe Balbi wrote:
> On Wed, Jul 09, 2014 at 11:02:43PM -0500, Felipe Balbi wrote:
> > Newer AM437x silicon requires us to explicitly power up
> > the USB2 PHY. By implementing usb_phy_power() we can
> > achieve that.
> > 
> > Signed-off-by: Felipe Balbi <balbi@ti.com>
> > ---
> 
> the only change here is the use of {set,clr}bits_le32()

Well, given the pressure before release, I picked the previous one (without 
clrsetbits). I think the original will also generate less code, so let's keep it 
at that. Sorry I've been pushing you around.

Best regards,
Marek Vasut

Patch

diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index b470319..efdecf4 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
@@ -43,6 +43,11 @@ 
 #define VTP0_CTRL_ADDR			0x44E10E0C
 #define VTP1_CTRL_ADDR			0x48140E10
 
+/* USB CTRL Base Address */
+#define USB1_CTRL			0x44e10628
+#define USB1_CTRL_CM_PWRDN		BIT(0)
+#define USB1_CTRL_OTG_PWRDN		BIT(1)
+
 /* DDR Base address */
 #define DDR_PHY_CMD_ADDR		0x44E12000
 #define DDR_PHY_DATA_ADDR		0x44E120C8
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index af46db2..53778b3 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -222,7 +222,16 @@  static void am437x_enable_usb2_phy2(struct omap_xhci *omap)
 
 void usb_phy_power(int on)
 {
-	return;
+	/*
+	 * In order to get USB working on newer AM43xx silicon, we must
+	 * explicitly power the USB PHYs.
+	 */
+	if (on)
+		clrbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
+				USB1_CTRL_OTG_PWRDN);
+	else
+		setbits_le32(USB1_CTRL, USB1_CTRL_CM_PWRDN |
+				USB1_CTRL_OTG_PWRDN);
 }
 #endif /* CONFIG_AM437X_USB2PHY2_HOST */