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[209.132.180.67]) by mx.google.com with ESMTP id xp3si12213544pbb.125.2014.07.15.10.18.30; Tue, 15 Jul 2014 10:18:30 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758418AbaGORPJ (ORCPT + 28 others); Tue, 15 Jul 2014 13:15:09 -0400 Received: from mail-we0-f181.google.com ([74.125.82.181]:55981 "EHLO mail-we0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755680AbaGORCM (ORCPT ); Tue, 15 Jul 2014 13:02:12 -0400 Received: by mail-we0-f181.google.com with SMTP id q59so5817788wes.26 for ; Tue, 15 Jul 2014 10:02:11 -0700 (PDT) X-Received: by 10.194.109.71 with SMTP id hq7mr13663682wjb.114.1405443731390; Tue, 15 Jul 2014 10:02:11 -0700 (PDT) Received: from Debian ([94.54.73.8]) by mx.google.com with ESMTPSA id k19sm45775959wie.20.2014.07.15.10.02.08 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Tue, 15 Jul 2014 10:02:10 -0700 (PDT) Received: from sam by Debian with local (Exim 4.80) (envelope-from ) id 1X7679-00040z-Ur; Tue, 15 Jul 2014 20:02:03 +0300 From: Sam Asadi To: gregkh@linuxfoundation.org Cc: devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Amit Daniel Kachhap , Doug Anderson , Kukjin Kim , sam-the-6 Subject: [PATCH 24/94] clocksource: exynos_mct: Register the timer for stable udelay Date: Tue, 15 Jul 2014 20:00:39 +0300 Message-Id: <1405443709-15288-24-git-send-email-asadi.samuel@gmail.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1405443709-15288-1-git-send-email-asadi.samuel@gmail.com> References: <1405443709-15288-1-git-send-email-asadi.samuel@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Original-Sender: asadi.samuel@gmail.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2607:f8b0:400c:c03::235 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=neutral (body hash did not verify) header.i=@; dmarc=fail (p=NONE dis=NONE) header.from=gmail.com Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Amit Daniel Kachhap This patch registers the exynos mct clocksource as the current timer as it has constant clock rate. This will generate correct udelay for the exynos platform and avoid using unnecessary calibrated jiffies. This change has been tested on exynos5420 based board and udelay is very close to expected. Without this patch udelay() on exynos5400 / exynos5800 is wildly inaccurate due to big.LITTLE not adjusting loops_per_jiffy correctly. Also without this patch udelay() on exynos5250 can be innacruate during transitions between frequencies < 800 MHz (you'll go 200 MHz -> 800 MHz -> 300 MHz and will run at 800 MHz for a time with the wrong loops_per_jiffy). [dianders: reworked and created version 3] Signed-off-by: Amit Daniel Kachhap Signed-off-by: Doug Anderson Signed-off-by: Kukjin Kim Signed-off-by: sam-the-6 --- drivers/clocksource/exynos_mct.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 5ce99c0..ab51bf20a 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -200,10 +200,21 @@ static u64 notrace exynos4_read_sched_clock(void) return _exynos4_frc_read(); } +static struct delay_timer exynos4_delay_timer; + +static cycles_t exynos4_read_current_timer(void) +{ + return _exynos4_frc_read(); +} + static void __init exynos4_clocksource_init(void) { exynos4_mct_frc_start(); + exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; + exynos4_delay_timer.freq = clk_rate; + register_current_timer_delay(&exynos4_delay_timer); + if (clocksource_register_hz(&mct_frc, clk_rate)) panic("%s: can't register clocksource\n", mct_frc.name);