[v2,1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support

Message ID	1607413467-17698-1-git-send-email-zhangqing@loongson.cn
State	New
Headers	show Return-Path: <linux-spi-owner@kernel.org> From: Qing Zhang <zhangqing@loongson.cn> To: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>, Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-spi@vger.kernel.org, Huacai Chen <chenhc@lemote.com>, Jiaxun Yang <jiaxun.yang@flygoat.com>, devicetree@vger.kernel.org, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, gaojuxin@loongson.cn, yangtiezhu@loongson.cn Subject: [PATCH v2 1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support Date: Tue, 8 Dec 2020 15:44:24 +0800 Message-Id: <1607413467-17698-1-git-send-email-zhangqing@loongson.cn> Precedence: bulk
Series	[v2,1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support \| expand [v2,1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support [v2,3/4] MIPS: Loongson64: DTS: Add SPI support to LS7A

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index aadaea0..af7c0d4 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -413,6 +413,13 @@ config SPI_LP8841_RTC Say N here unless you plan to run the kernel on an ICP DAS LP-8x4x industrial computer. +config SPI_LS7A + tristate "Loongson LS7A SPI Controller Support" + depends on CPU_LOONGSON64 || COMPILE_TEST + help + This drivers supports the Loongson LS7A SPI controller in master + SPI mode. + config SPI_MPC52xx tristate "Freescale MPC52xx SPI (non-PSC) controller support" depends on PPC_MPC52xx diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 6fea582..d015cf2 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -61,6 +61,7 @@ obj-$(CONFIG_SPI_LANTIQ_SSC) += spi-lantiq-ssc.o obj-$(CONFIG_SPI_JCORE) += spi-jcore.o obj-$(CONFIG_SPI_LM70_LLP) += spi-lm70llp.o obj-$(CONFIG_SPI_LP8841_RTC) += spi-lp8841-rtc.o +obj-$(CONFIG_SPI_LS7A) += spi-ls7a.o obj-$(CONFIG_SPI_MESON_SPICC) += spi-meson-spicc.o obj-$(CONFIG_SPI_MESON_SPIFC) += spi-meson-spifc.o obj-$(CONFIG_SPI_MPC512x_PSC) += spi-mpc512x-psc.o diff --git a/drivers/spi/spi-ls7a.c b/drivers/spi/spi-ls7a.c new file mode 100644 index 0000000..21ca1ab --- /dev/null +++ b/drivers/spi/spi-ls7a.c @@ -0,0 +1,324 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Loongson LS7A SPI Controller driver + * + * Copyright (C) 2020 Loongson Technology Corporation Limited + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/interrupt.h> +#include <linux/delay.h> +#include <linux/platform_device.h> +#include <linux/err.h> +#include <linux/spi/spi.h> +#include <linux/pci.h> +#include <linux/of.h> + +/* define spi register */ +#define SPCR 0x00 +#define SPSR 0x01 +#define FIFO 0x02 +#define SPER 0x03 +#define PARA 0x04 +#define SFCS 0x05 +#define TIMI 0x06 + +struct ls7a_spi { + spinlock_t lock; + struct spi_master *master; + void __iomem *base; + int cs_active; + unsigned int hz; + unsigned char spcr, sper; + unsigned int mode; +}; + +static void ls7a_spi_write_reg(struct ls7a_spi *spi, + unsigned char reg, + unsigned char data) +{ + writeb(data, spi->base + reg); +} + +static char ls7a_spi_read_reg(struct ls7a_spi *spi, + unsigned char reg) +{ + return readb(spi->base + reg); +} + +static int set_cs(struct ls7a_spi *ls7a_spi, struct spi_device *spi, int val) +{ + int cs = ls7a_spi_read_reg(ls7a_spi, SFCS) & ~(0x11 << spi->chip_select); + + if (spi->mode & SPI_CS_HIGH) + val = !val; + ls7a_spi_write_reg(ls7a_spi, SFCS, + (val ? (0x11 << spi->chip_select):(0x1 << spi->chip_select)) | cs); + + return 0; +} + +static int ls7a_spi_do_transfer(struct ls7a_spi *ls7a_spi, + struct spi_device *spi, + struct spi_transfer *t) +{ + unsigned int hz; + unsigned int div, div_tmp; + unsigned int bit; + unsigned long clk; + unsigned char val; + const char rdiv[12] = {0, 1, 4, 2, 3, 5, 6, 7, 8, 9, 10, 11}; + + if (t) { + hz = t->speed_hz; + if (!hz) + hz = spi->max_speed_hz; + } else + hz = spi->max_speed_hz; + + if (((spi->mode ^ ls7a_spi->mode) & (SPI_CPOL | SPI_CPHA)) + || (hz && ls7a_spi->hz != hz)) { + clk = 100000000; + + div = DIV_ROUND_UP(clk, hz); + if (div < 2) + div = 2; + if (div > 4096) + div = 4096; + + bit = fls(div) - 1; + if ((1<<bit) == div) + bit--; + div_tmp = rdiv[bit]; + + dev_dbg(&spi->dev, "clk = %ld hz = %d div_tmp = %d bit = %d\n", + clk, hz, div_tmp, bit); + + ls7a_spi->hz = hz; + ls7a_spi->spcr = div_tmp & 3; + ls7a_spi->sper = (div_tmp >> 2) & 3; + + val = ls7a_spi_read_reg(ls7a_spi, SPCR); + val &= ~0xc; + if (spi->mode & SPI_CPOL) + val |= 8; + if (spi->mode & SPI_CPHA) + val |= 4; + ls7a_spi_write_reg(ls7a_spi, SPCR, (val & ~3) | ls7a_spi->spcr); + val = ls7a_spi_read_reg(ls7a_spi, SPER); + ls7a_spi_write_reg(ls7a_spi, SPER, (val & ~3) | ls7a_spi->sper); + ls7a_spi->mode = spi->mode; + } + return 0; +} + +static int ls7a_spi_setup(struct spi_device *spi) +{ + struct ls7a_spi *ls7a_spi; + + ls7a_spi = spi_master_get_devdata(spi->master); + + if (spi->chip_select >= spi->master->num_chipselect) + return -EINVAL; + + set_cs(ls7a_spi, spi, 1); + + return 0; +} + +static int ls7a_spi_write_read_8bit(struct spi_device *spi, + const u8 **tx_buf, u8 **rx_buf, + unsigned int num) +{ + struct ls7a_spi *ls7a_spi; + + ls7a_spi = spi_master_get_devdata(spi->master); + + if (tx_buf && *tx_buf) { + ls7a_spi_write_reg(ls7a_spi, FIFO, *((*tx_buf)++)); + + while ((ls7a_spi_read_reg(ls7a_spi, SPSR) & 0x1) == 1) + ; + } else { + ls7a_spi_write_reg(ls7a_spi, FIFO, 0); + + while ((ls7a_spi_read_reg(ls7a_spi, SPSR) & 0x1) == 1) + ; + } + + if (rx_buf && *rx_buf) + *(*rx_buf)++ = ls7a_spi_read_reg(ls7a_spi, FIFO); + else + ls7a_spi_read_reg(ls7a_spi, FIFO); + + return 1; +} + +static unsigned int ls7a_spi_write_read(struct spi_device *spi, + struct spi_transfer *xfer) +{ + struct ls7a_spi *ls7a_spi; + unsigned int count; + const u8 *tx = xfer->tx_buf; + u8 *rx = xfer->rx_buf; + + ls7a_spi = spi_master_get_devdata(spi->master); + count = xfer->len; + + do { + if (ls7a_spi_write_read_8bit(spi, &tx, &rx, count) < 0) + goto out; + count--; + } while (count); + +out: + return xfer->len - count; +} + +static int ls7a_spi_transfer_one_message(struct spi_master *master, + struct spi_message *m) +{ + struct ls7a_spi *ls7a_spi; + struct spi_device *spi; + struct spi_transfer *t = NULL; + int param, status, r; + unsigned int total_len = 0; + unsigned int cs_change; + const int nsecs = 50; + + ls7a_spi = spi_master_get_devdata(master); + spi = m->spi; + + cs_change = 1; + + spin_lock(&ls7a_spi->lock); + param = ls7a_spi_read_reg(ls7a_spi, PARA); + ls7a_spi_write_reg(ls7a_spi, PARA, param&~1); + spin_unlock(&ls7a_spi->lock); + list_for_each_entry(t, &m->transfers, transfer_list) { + if (cs_change) { + set_cs(ls7a_spi, spi, 0); + ls7a_spi_do_transfer(ls7a_spi, spi, t); + ndelay(nsecs); + } + cs_change = t->cs_change; + + r = ls7a_spi_write_read(spi, t); + if (r < 0) { + status = r; + goto error; + } + total_len += r; + + spi_transfer_delay_exec(t); + + if (cs_change) { + set_cs(ls7a_spi, spi, 1); + ndelay(nsecs); + } + } + + spin_lock(&ls7a_spi->lock); + ls7a_spi_write_reg(ls7a_spi, PARA, param); + spin_unlock(&ls7a_spi->lock); + + if (!cs_change) { + ndelay(nsecs); + set_cs(ls7a_spi, spi, 1); + } + +error: + m->status = status; + m->actual_length = total_len; + spi_finalize_current_message(master); + return status; +} + +static int ls7a_spi_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct device *dev = &pdev->dev; + struct spi_master *master; + struct ls7a_spi *spi; + int ret; + + master = spi_alloc_master(&pdev->dev, sizeof(struct ls7a_spi)); + if (!master) + return -ENOMEM; + + spi = spi_master_get_devdata(master); + ret = pcim_enable_device(pdev); + if (ret) + goto err_free_master; + + ret = pci_request_regions(pdev, "ls7a-spi"); + if (ret) + goto err_free_master; + + spi->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0)); + if (!spi->base) { + ret = -EINVAL; + goto err_free_master; + } + ls7a_spi_write_reg(spi, SPCR, 0x51); + ls7a_spi_write_reg(spi, SPER, 0x00); + ls7a_spi_write_reg(spi, TIMI, 0x01); + ls7a_spi_write_reg(spi, PARA, 0x40); + spi->mode = 0; + + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; + master->setup = ls7a_spi_setup; + master->transfer_one_message = ls7a_spi_transfer_one_message; + master->bits_per_word_mask = SPI_BPW_MASK(8); + master->num_chipselect = 4; + master->dev.of_node = of_node_get(pdev->dev.of_node); + + spi->master = master; + + pci_set_drvdata(pdev, master); + + ret = devm_spi_register_master(dev, master); + if (ret) + goto err_free_master; + + return 0; + +err_free_master: + pci_release_regions(pdev); + spi_master_put(master); + return ret; +} + +static void ls7a_spi_pci_remove(struct pci_dev *pdev) +{ + struct spi_master *master = pci_get_drvdata(pdev); + struct ls7a_spi *spi; + + spi = spi_master_get_devdata(master); + if (!spi) + return; + + pci_release_regions(pdev); +} + +static const struct pci_device_id ls7a_spi_pci_id_table[] = { + { PCI_DEVICE(PCI_VENDOR_ID_LOONGSON, 0x7a0b) }, + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, ls7a_spi_pci_id_table); + +static struct pci_driver ls7a_spi_pci_driver = { + .name = "ls7a-spi", + .id_table = ls7a_spi_pci_id_table, + .probe = ls7a_spi_pci_probe, + .remove = ls7a_spi_pci_remove, +}; + +module_pci_driver(ls7a_spi_pci_driver); + +MODULE_AUTHOR("Juxin Gao <gaojuxin@loongson.cn>"); +MODULE_AUTHOR("Qing Zhang <zhangqing@loongson.cn>"); +MODULE_DESCRIPTION("Loongson LS7A SPI controller driver");

[v2,1/4] spi: LS7A: Add Loongson LS7A SPI controller driver support

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