diff mbox series

[net,1/2] net: mvpp2: Fix GoP port 3 Networking Complex Control configurations

Message ID 1608039133-16345-1-git-send-email-stefanc@marvell.com
State Superseded
Headers show
Series [net,1/2] net: mvpp2: Fix GoP port 3 Networking Complex Control configurations | expand

Commit Message

Stefan Chulski Dec. 15, 2020, 1:32 p.m. UTC
From: Stefan Chulski <stefanc@marvell.com>

During GoP port 2 Networking Complex Control mode of operation configurations,
also GoP port 3 mode of operation was wrongly set mode.
Patch removes these configurations.
GENCONF_CTRL0_PORTX naming also fixed.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h      | 6 +++---
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 8 ++++----
 2 files changed, 7 insertions(+), 7 deletions(-)

Comments

Jakub Kicinski Dec. 17, 2020, 12:42 a.m. UTC | #1
On Tue, 15 Dec 2020 15:32:12 +0200 stefanc@marvell.com wrote:
> From: Stefan Chulski <stefanc@marvell.com>

> 

> During GoP port 2 Networking Complex Control mode of operation configurations,

> also GoP port 3 mode of operation was wrongly set mode.

> Patch removes these configurations.

> GENCONF_CTRL0_PORTX naming also fixed.


Can we get a Fixes tag?
Stefan Chulski Dec. 17, 2020, 9:38 a.m. UTC | #2
> -----Original Message-----

> From: Jakub Kicinski <kuba@kernel.org>

> Sent: Thursday, December 17, 2020 2:42 AM

> To: Stefan Chulski <stefanc@marvell.com>

> Cc: netdev@vger.kernel.org; thomas.petazzoni@bootlin.com;

> davem@davemloft.net; Nadav Haklai <nadavh@marvell.com>; Yan Markman

> <ymarkman@marvell.com>; linux-kernel@vger.kernel.org;

> linux@armlinux.org.uk; mw@semihalf.com; andrew@lunn.ch;

> rmk+kernel@armlinux.org.uk

> Subject: [EXT] Re: [PATCH net 1/2] net: mvpp2: Fix GoP port 3 Networking

> Complex Control configurations

> 

> External Email

> 

> ----------------------------------------------------------------------

> On Tue, 15 Dec 2020 15:32:12 +0200 stefanc@marvell.com wrote:

> > From: Stefan Chulski <stefanc@marvell.com>

> >

> > During GoP port 2 Networking Complex Control mode of operation

> > configurations, also GoP port 3 mode of operation was wrongly set mode.

> > Patch removes these configurations.

> > GENCONF_CTRL0_PORTX naming also fixed.

> 

> Can we get a Fixes tag?


Reposting with Fixes tag.

Stefan.
diff mbox series

Patch

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
index 6bd7e40..39c4e5c 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h
@@ -651,9 +651,9 @@ 
 #define     GENCONF_PORT_CTRL1_EN(p)			BIT(p)
 #define     GENCONF_PORT_CTRL1_RESET(p)			(BIT(p) << 28)
 #define GENCONF_CTRL0					0x1120
-#define     GENCONF_CTRL0_PORT0_RGMII			BIT(0)
-#define     GENCONF_CTRL0_PORT1_RGMII_MII		BIT(1)
-#define     GENCONF_CTRL0_PORT1_RGMII			BIT(2)
+#define     GENCONF_CTRL0_PORT2_RGMII			BIT(0)
+#define     GENCONF_CTRL0_PORT3_RGMII_MII		BIT(1)
+#define     GENCONF_CTRL0_PORT3_RGMII			BIT(2)
 
 /* Various constants */
 
diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index d64dc12..d2b0506 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -1231,9 +1231,9 @@  static void mvpp22_gop_init_rgmii(struct mvpp2_port *port)
 
 	regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val);
 	if (port->gop_id == 2)
-		val |= GENCONF_CTRL0_PORT0_RGMII | GENCONF_CTRL0_PORT1_RGMII;
+		val |= GENCONF_CTRL0_PORT2_RGMII;
 	else if (port->gop_id == 3)
-		val |= GENCONF_CTRL0_PORT1_RGMII_MII;
+		val |= GENCONF_CTRL0_PORT3_RGMII_MII;
 	regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
 }
 
@@ -1250,9 +1250,9 @@  static void mvpp22_gop_init_sgmii(struct mvpp2_port *port)
 	if (port->gop_id > 1) {
 		regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val);
 		if (port->gop_id == 2)
-			val &= ~GENCONF_CTRL0_PORT0_RGMII;
+			val &= ~GENCONF_CTRL0_PORT2_RGMII;
 		else if (port->gop_id == 3)
-			val &= ~GENCONF_CTRL0_PORT1_RGMII_MII;
+			val &= ~GENCONF_CTRL0_PORT3_RGMII_MII;
 		regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
 	}
 }