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[209.132.180.67]) by mx.google.com with ESMTP id qi7si1995138pac.32.2014.08.05.06.31.19 for ; Tue, 05 Aug 2014 06:31:20 -0700 (PDT) Received-SPF: none (google.com: stable-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753235AbaHENbT (ORCPT + 1 other); Tue, 5 Aug 2014 09:31:19 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:37249 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752296AbaHENbS (ORCPT ); Tue, 5 Aug 2014 09:31:18 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id s75DVH2Z026206; Tue, 5 Aug 2014 08:31:17 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s75DVG8t009758; Tue, 5 Aug 2014 08:31:16 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.174.1; Tue, 5 Aug 2014 08:31:16 -0500 Received: from localhost.localdomain (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s75DVEiN030268; Tue, 5 Aug 2014 08:31:14 -0500 From: Roger Quadros To: CC: , , Roger Quadros , Tero Kristo , "[3.13+]" , Tony Lindgren Subject: [PATCH] ARM: dts: dra7-evm: Make VDDA_1V8_PHY supply always on Date: Tue, 5 Aug 2014 16:31:12 +0300 Message-ID: <1407245472-14313-1-git-send-email-rogerq@ti.com> X-Mailer: git-send-email 1.8.3.2 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: stable@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rogerq@ti.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , commit e120fb459693bbc1ac3eabdd65c3659d7cfbfd2a upstream. After clarification from the hardware team it was found that this 1.8V PHY supply can't be switched OFF when SoC is Active. Since the PHY IPs don't contain isolation logic built in the design to allow the power rail to be switched off, there is a very high risk of IP reliability and additional leakage paths which can result in additional power consumption. The only scenario where this rail can be switched off is part of Power on reset sequencing, but it needs to be kept always-on during operation. This patch is required for proper functionality of USB, SATA and PCIe on DRA7-evm. Fixes: c56a831ca47e (ARM: dts: DRA7: Add TPS659038 PMIC nodes) CC: Tero Kristo CC: [3.13+] Signed-off-by: Roger Quadros Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-evm.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 96f231a..19d6092 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -373,6 +373,7 @@ regulator-name = "ldo3"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; + regulator-always-on; regulator-boot-on; };