[024/108] target-arm: A64: fix unallocated test of scalar SQXTUN

Message ID 1407357598-21541-25-git-send-email-mdroth@linux.vnet.ibm.com
State New
Headers show

Commit Message

Michael Roth Aug. 6, 2014, 8:38 p.m.
From: Alex Bennée <alex.bennee@linaro.org>

The test for the U bit was incorrectly inverted in the scalar case of SQXTUN.
This doesn't affect the vector case as the U bit is used to select XTN(2).

Reported-by: Hao Liu <hao.liu@arm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit e44a90c59697cf98e05619fbb6f77a403d347495)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
 target-arm/translate-a64.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)


diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 9175e48..a780366 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -7455,7 +7455,7 @@  static void disas_simd_scalar_two_reg_misc(DisasContext *s, uint32_t insn)
     case 0x12: /* SQXTUN */
-        if (u) {
+        if (!u) {