| Message ID | 20210116012515.3152-8-tobias@waldekranz.com |
|---|---|
| State | New |
| Headers | show |
| Series | net: dsa: Sync local bridge FDB addresses to hardware | expand |
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 91286d7b12c7..398f3cc8d2f3 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5726,6 +5726,7 @@ static int mv88e6xxx_register_switch(struct mv88e6xxx_chip *chip) ds->ops = &mv88e6xxx_switch_ops; ds->ageing_time_min = chip->info->age_time_coeff; ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; + ds->assisted_learning_on_cpu_port = true; /* Some chips support up to 32, but that requires enabling the * 5-bit port mode, which we do not support. 640k^W16 ought to
While the hardware is capable of performing learning on the CPU port, it requires alot of additions to the bridge's forwarding path in order to handle multi-destination traffic correctly. Until that is in place, opt for the next best thing and let DSA sync the relevant addresses down to the hardware FDB. Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com> --- drivers/net/dsa/mv88e6xxx/chip.c | 1 + 1 file changed, 1 insertion(+)