diff mbox

[PULL,02/23] cpu-exec.c: Allow disabling of IRQs on ARM Cortex-M CPUs

Message ID 1410528234-13545-3-git-send-email-peter.maydell@linaro.org
State Accepted
Commit c3c8d6b3ddc881fb2ebd651e320cda36b2ec079b
Headers show

Commit Message

Peter Maydell Sept. 12, 2014, 1:23 p.m. UTC 
From: David Hoover <spm@boiteauxlettres.sent.at>

Correct an error in the logic for deciding whether we can
take an IRQ interrupt which meant that on M profile cores
it was never possible to disable them.

The design here is still bogus in that M profile doesn't
have separate "IRQ" and "FIQ", which are an A/R profile
concept; we should ideally implement the proper priority
based scheme.

Signed-off-by: David Hoover <spm@boiteauxlettres.sent.at>
[PMM: Wrote a proper commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 cpu-exec.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/cpu-exec.c b/cpu-exec.c
index 7b5d2e2..e9adf56 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -618,8 +618,8 @@  int cpu_exec(CPUArchState *env)
                        We avoid this by disabling interrupts when
                        pc contains a magic address.  */
                     if (interrupt_request & CPU_INTERRUPT_HARD
-                        && ((IS_M(env) && env->regs[15] < 0xfffffff0)
-                            || !(env->daif & PSTATE_I))) {
+                        && !(env->daif & PSTATE_I)
+                        && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
                         cpu->exception_index = EXCP_IRQ;
                         cc->do_interrupt(cpu);
                         next_tb = 0;