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[12/18] arm64: dts: qcom: msm8994-octagon: Configure Lattice iCE40 FPGA

Message ID 20210131013853.55810-13-konrad.dybcio@somainline.org
State New
Headers show
Series 8992/4/Lumia 950/XL DTS updates | expand

Commit Message

Konrad Dybcio Jan. 31, 2021, 1:38 a.m. UTC 
From: Gustave Monce <gustave.monce@outlook.com>

Octagon devices have a Lattice iCE40 FPGA connected over SPI.
Configure it.

Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 .../dts/qcom/msm8994-msft-lumia-octagon.dtsi  | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

Comments

Pavel Machek Feb. 18, 2021, 1:43 p.m. UTC | #1 
On Sun 2021-01-31 02:38:43, Konrad Dybcio wrote:
> From: Gustave Monce <gustave.monce@outlook.com>

> 

> Octagon devices have a Lattice iCE40 FPGA connected over SPI.

> Configure it.


> +	status = "okay";

> +

> +	/*

> +	 * This device is a Lattice UC120 USB-C PD PHY.

> +	 * It is actually a Lattice iCE40 FPGA pre-programmed by

> +	 * the device firmware with a specific bitstream

> +	 * enabling USB Type C PHY functionality.

> +	 * Communication is done via a proprietary protocol over SPI.

> +	 *


Wow. That's interesting hardware design. Someone should put RISC-V CPU
in there!

Best regards,
									Pavel
									
-- 
http://www.livejournal.com/~pavelmachek
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
index 004a42261cef..73af5265df9b 100644
--- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
@@ -304,6 +304,27 @@  &blsp1_uart2 {
 	status = "okay";
 };
 
+&blsp2_spi4 {
+	status = "okay";
+
+	/*
+	 * This device is a Lattice UC120 USB-C PD PHY.
+	 * It is actually a Lattice iCE40 FPGA pre-programmed by
+	 * the device firmware with a specific bitstream
+	 * enabling USB Type C PHY functionality.
+	 * Communication is done via a proprietary protocol over SPI.
+	 *
+	 * TODO: Once a proper driver is available, replace this.
+	 */
+	uc120: ice5lp2k@0 {
+		compatible = "lattice,ice40-fpga-mgr";
+		reg = <0>;
+		spi-max-frequency = <5000000>;
+		cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>;
+	};
+};
+
 &blsp2_uart2 {
 	status = "okay";