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spi: spi-synquacer: fix set_cs handling

Message ID 20210201073109.9036-1-jassisinghbrar@gmail.com
State New
Headers show
Series spi: spi-synquacer: fix set_cs handling | expand

Commit Message

Jassi Brar Feb. 1, 2021, 7:31 a.m. UTC 
From: Masahisa Kojima <masahisa.kojima@linaro.org>

When the slave chip select is deasserted, DMSTOP bit
must be set.

Fixes: b0823ee35cf9 ("spi: Add spi driver for Socionext SynQuacer platform")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Cc: stable@vger.kernel.org
---
 drivers/spi/spi-synquacer.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Mark Brown Feb. 3, 2021, 9:08 p.m. UTC | #1 
On Mon, 1 Feb 2021 01:31:09 -0600, jassisinghbrar@gmail.com wrote:
> When the slave chip select is deasserted, DMSTOP bit

> must be set.


Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/1] spi: spi-synquacer: fix set_cs handling
      commit: 1c9f1750f0305bf605ff22686fc0ac89c06deb28

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark
diff mbox series

Patch

diff --git a/drivers/spi/spi-synquacer.c b/drivers/spi/spi-synquacer.c
index 42e82dbe3d41..a3344f1cc8ff 100644
--- a/drivers/spi/spi-synquacer.c
+++ b/drivers/spi/spi-synquacer.c
@@ -490,6 +490,10 @@  static void synquacer_spi_set_cs(struct spi_device *spi, bool enable)
 	val &= ~(SYNQUACER_HSSPI_DMPSEL_CS_MASK <<
 		 SYNQUACER_HSSPI_DMPSEL_CS_SHIFT);
 	val |= spi->chip_select << SYNQUACER_HSSPI_DMPSEL_CS_SHIFT;
+
+	if (!enable)
+		val |= SYNQUACER_HSSPI_DMSTOP_STOP;
+
 	writel(val, sspi->regs + SYNQUACER_HSSPI_REG_DMSTART);
 }