@@ -79,6 +79,9 @@ static unsigned long *__cpu_capacity;
static unsigned long middle_capacity = 1;
+static unsigned long max_raw_capacity = 1;
+static DEFINE_PER_CPU(unsigned long, cpu_raw_capacity);
+
/*
* Iterate all CPUs' descriptor in DT and compute the efficiency
* (as per table_efficiency). Also calculate a middle efficiency
@@ -117,6 +120,9 @@ static void __init parse_dt_topology(void)
if (cpu_eff->compatible == NULL)
continue;
+ per_cpu(cpu_raw_capacity, cpu) = cpu_eff->efficiency;
+ max_raw_capacity = max(max_raw_capacity, cpu_eff->efficiency);
+
rate = of_get_property(cn, "clock-frequency", &len);
if (!rate || len != 4) {
pr_err("%s missing clock-frequency property\n",
@@ -173,7 +179,8 @@ static void update_cpu_capacity(unsigned int cpu)
* Scheduler load-tracking scale-invariance
*
* Provides the scheduler with a scale-invariance correction factor that
- * compensates for frequency scaling.
+ * compensates for frequency scaling and micro-architecture differences between
+ * cpus.
*/
static DEFINE_PER_CPU(atomic_long_t, cpu_curr_freq);
@@ -195,11 +202,15 @@ unsigned long arch_scale_load_capacity(int cpu)
{
unsigned long curr = atomic_long_read(&per_cpu(cpu_curr_freq, cpu));
unsigned long max = atomic_long_read(&per_cpu(cpu_max_freq, cpu));
+ unsigned long ret;
- if (!max)
+ if (!max || !per_cpu(cpu_raw_capacity, cpu))
return SCHED_CAPACITY_SCALE;
- return (curr * SCHED_CAPACITY_SCALE) / max;
+ ret = (curr * SCHED_CAPACITY_SCALE) / max;
+ ret = (ret * per_cpu(cpu_raw_capacity, cpu)) / max_raw_capacity;
+
+ return ret;
}
#else
Adds micro-architecture difference into scheduler load-tracking scale-invariance correction factor for big.LITTLE systems. The factor is now: (current_freq(cpu) * uarch_factor(cpu) * SCHED_CAPACITY_SCALE) / (max_freq(cpu) * max_uarch_factor) Signed-off-by: Morten Rasmussen <morten.rasmussen@arm.com> --- arch/arm/kernel/topology.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-)