[v6,2/5] arm: dts: qcom: Add SPM device bindings for 8974

Message ID 1411516281-58328-3-git-send-email-lina.iyer@linaro.org
State New
Headers show

Commit Message

Lina Iyer Sept. 23, 2014, 11:51 p.m.
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power manager and controls the logic around the cores (cpu and L2).

Each core has an instance of SPM and controls only that core. Each cpu
SPM is configured to support WFI and SPC (standalone-power collapse).

Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
---
 arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69 ++++++++++++++++++++++++++++++++++
 arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
 2 files changed, 75 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi

Comments

Pramod Gurav Sept. 24, 2014, 6:18 a.m. | #1
Hi Lina,

On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
> Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
> power manager and controls the logic around the cores (cpu and L2).
> 
> Each core has an instance of SPM and controls only that core. Each cpu
> SPM is configured to support WFI and SPC (standalone-power collapse).
> 
> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
> ---
>  arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69 ++++++++++++++++++++++++++++++++++
>  arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>  2 files changed, 75 insertions(+), 4 deletions(-)
>  create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi

<snip>

> +};
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> index 69dca2a..0580bc2 100644
> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -14,7 +14,7 @@
>  		#size-cells = <0>;
>  		interrupts = <1 9 0xf04>;
>  
> -		cpu@0 {
> +		CPU0: cpu@0 {
Lina, Stephen boyd has sent some DT change for krait-cpufreq which also
renames this node to "cpu0: cpu@0". If you both could sync up and agree
on a common naming('cpu0' with caps or not caps) for this node.

Best Regards
Pramod

>  			compatible = "qcom,krait";
>  			enable-method = "qcom,kpss-acc-v2";
>  			device_type = "cpu";
> @@ -23,7 +23,7 @@
>  			qcom,acc = <&acc0>;
>  		};
>  
> -		cpu@1 {
> +		CPU1: cpu@1 {
Ditto
>  			compatible = "qcom,krait";
>  			enable-method = "qcom,kpss-acc-v2";
>  			device_type = "cpu";
> @@ -32,7 +32,7 @@
>  			qcom,acc = <&acc1>;
>  		};
>  
> -		cpu@2 {
> +		CPU2: cpu@2 {
Ditto
>  			compatible = "qcom,krait";
>  			enable-method = "qcom,kpss-acc-v2";
>  			device_type = "cpu";
> @@ -41,7 +41,7 @@
>  			qcom,acc = <&acc2>;
>  		};
>  
> -		cpu@3 {
> +		CPU3: cpu@3 {
Ditto
>  			compatible = "qcom,krait";
>  			enable-method = "qcom,kpss-acc-v2";
>  			device_type = "cpu";
> @@ -238,3 +238,5 @@
>  		};
>  	};
>  };
> +
> +#include "qcom-msm8974-pm.dtsi"
> 
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Lina Iyer Sept. 24, 2014, 1:49 p.m. | #2
On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
>Hi Lina,
>
>On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
>> Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
>> power manager and controls the logic around the cores (cpu and L2).
>>
>> Each core has an instance of SPM and controls only that core. Each cpu
>> SPM is configured to support WFI and SPC (standalone-power collapse).
>>
>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>> ---
>>  arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69 ++++++++++++++++++++++++++++++++++
>>  arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>>  2 files changed, 75 insertions(+), 4 deletions(-)
>>  create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi
>
><snip>
>
>> +};
>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> index 69dca2a..0580bc2 100644
>> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> @@ -14,7 +14,7 @@
>>  		#size-cells = <0>;
>>  		interrupts = <1 9 0xf04>;
>>
>> -		cpu@0 {
>> +		CPU0: cpu@0 {
>Lina, Stephen boyd has sent some DT change for krait-cpufreq which also
>renames this node to "cpu0: cpu@0". If you both could sync up and agree
>on a common naming('cpu0' with caps or not caps) for this node.
>
Sure. Will work with Stephen on that.

>Best Regards
>Pramod
>
>>  			compatible = "qcom,krait";
>>  			enable-method = "qcom,kpss-acc-v2";
>>  			device_type = "cpu";
>> @@ -23,7 +23,7 @@
>>  			qcom,acc = <&acc0>;
>>  		};
>>
>> -		cpu@1 {
>> +		CPU1: cpu@1 {
>Ditto
>>  			compatible = "qcom,krait";
>>  			enable-method = "qcom,kpss-acc-v2";
>>  			device_type = "cpu";
>> @@ -32,7 +32,7 @@
>>  			qcom,acc = <&acc1>;
>>  		};
>>
>> -		cpu@2 {
>> +		CPU2: cpu@2 {
>Ditto
>>  			compatible = "qcom,krait";
>>  			enable-method = "qcom,kpss-acc-v2";
>>  			device_type = "cpu";
>> @@ -41,7 +41,7 @@
>>  			qcom,acc = <&acc2>;
>>  		};
>>
>> -		cpu@3 {
>> +		CPU3: cpu@3 {
>Ditto
>>  			compatible = "qcom,krait";
>>  			enable-method = "qcom,kpss-acc-v2";
>>  			device_type = "cpu";
>> @@ -238,3 +238,5 @@
>>  		};
>>  	};
>>  };
>> +
>> +#include "qcom-msm8974-pm.dtsi"
>>
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Kumar Gala Sept. 24, 2014, 2:03 p.m. | #3
On Sep 24, 2014, at 8:49 AM, Lina Iyer <lina.iyer@linaro.org> wrote:

> On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
>> Hi Lina,
>> 
>> On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
>>> Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
>>> power manager and controls the logic around the cores (cpu and L2).
>>> 
>>> Each core has an instance of SPM and controls only that core. Each cpu
>>> SPM is configured to support WFI and SPC (standalone-power collapse).
>>> 
>>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>>> ---
>>> arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69 ++++++++++++++++++++++++++++++++++
>>> arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>>> 2 files changed, 75 insertions(+), 4 deletions(-)
>>> create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi

please also have a dts for 8084 as part of this patch series.

- k
Lina Iyer Sept. 24, 2014, 2:13 p.m. | #4
On Wed, Sep 24 2014 at 08:03 -0600, Kumar Gala wrote:
>
>On Sep 24, 2014, at 8:49 AM, Lina Iyer <lina.iyer@linaro.org> wrote:
>
>> On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
>>> Hi Lina,
>>>
>>> On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
>>>> Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
>>>> power manager and controls the logic around the cores (cpu and L2).
>>>>
>>>> Each core has an instance of SPM and controls only that core. Each cpu
>>>> SPM is configured to support WFI and SPC (standalone-power collapse).
>>>>
>>>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>>>> ---
>>>> arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69 ++++++++++++++++++++++++++++++++++
>>>> arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>>>> 2 files changed, 75 insertions(+), 4 deletions(-)
>>>> create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi
>
>please also have a dts for 8084 as part of this patch series.

Sure. Any particular interest at this time? I dont have a device to
test, I will order one, may take a few weeks.

>
>- k
>
>-- 
>Employee of Qualcomm Innovation Center, Inc.
>Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
>
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Stephen Boyd Sept. 24, 2014, 5:21 p.m. | #5
On 09/24/14 06:49, Lina Iyer wrote:
> On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
>> Hi Lina,
>>
>> On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
>>> Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
>>> power manager and controls the logic around the cores (cpu and L2).
>>>
>>> Each core has an instance of SPM and controls only that core. Each cpu
>>> SPM is configured to support WFI and SPC (standalone-power collapse).
>>>
>>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>>> ---
>>>  arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69
>>> ++++++++++++++++++++++++++++++++++
>>>  arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>>>  2 files changed, 75 insertions(+), 4 deletions(-)
>>>  create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi
>>
>> <snip>
>>
>>> +};
>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> index 69dca2a..0580bc2 100644
>>> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> @@ -14,7 +14,7 @@
>>>          #size-cells = <0>;
>>>          interrupts = <1 9 0xf04>;
>>>
>>> -        cpu@0 {
>>> +        CPU0: cpu@0 {
>> Lina, Stephen boyd has sent some DT change for krait-cpufreq which also
>> renames this node to "cpu0: cpu@0". If you both could sync up and agree
>> on a common naming('cpu0' with caps or not caps) for this node.
>>
> Sure. Will work with Stephen on that.
>

This doesn't seem like a big deal. I imagine Kumar can resolve the
conflict if the two patches merge at the same time.
Lina Iyer Sept. 24, 2014, 5:23 p.m. | #6
On Wed, Sep 24 2014 at 11:21 -0600, Stephen Boyd wrote:
>On 09/24/14 06:49, Lina Iyer wrote:
>> On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
>>> Hi Lina,
>>>
>>> On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
>>>> Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
>>>> power manager and controls the logic around the cores (cpu and L2).
>>>>
>>>> Each core has an instance of SPM and controls only that core. Each cpu
>>>> SPM is configured to support WFI and SPC (standalone-power collapse).
>>>>
>>>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>>>> ---
>>>>  arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69
>>>> ++++++++++++++++++++++++++++++++++
>>>>  arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>>>>  2 files changed, 75 insertions(+), 4 deletions(-)
>>>>  create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi
>>>
>>> <snip>
>>>
>>>> +};
>>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> index 69dca2a..0580bc2 100644
>>>> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> @@ -14,7 +14,7 @@
>>>>          #size-cells = <0>;
>>>>          interrupts = <1 9 0xf04>;
>>>>
>>>> -        cpu@0 {
>>>> +        CPU0: cpu@0 {
>>> Lina, Stephen boyd has sent some DT change for krait-cpufreq which also
>>> renames this node to "cpu0: cpu@0". If you both could sync up and agree
>>> on a common naming('cpu0' with caps or not caps) for this node.
>>>
>> Sure. Will work with Stephen on that.
>>
>
>This doesn't seem like a big deal. I imagine Kumar can resolve the
>conflict if the two patches merge at the same time.
>
I can use the lower case names, if thats common. I see that being used
for referring to <&acc> in that file, but ofcourse <&L2> exists as well.
Any preference?

>-- 
>Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
>hosted by The Linux Foundation
>
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Stephen Boyd Sept. 24, 2014, 9:46 p.m. | #7
On 09/24/14 10:23, Lina Iyer wrote:
> On Wed, Sep 24 2014 at 11:21 -0600, Stephen Boyd wrote:
>> On 09/24/14 06:49, Lina Iyer wrote:
>>> On Wed, Sep 24 2014 at 00:14 -0600, Pramod Gurav wrote:
>>>> Hi Lina,
>>>>
>>>> On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
>>>>> Add SPM device bindings for QCOM 8974 based cpus. SPM is the
>>>>> sub-system
>>>>> power manager and controls the logic around the cores (cpu and L2).
>>>>>
>>>>> Each core has an instance of SPM and controls only that core. Each
>>>>> cpu
>>>>> SPM is configured to support WFI and SPC (standalone-power collapse).
>>>>>
>>>>> Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
>>>>> ---
>>>>>  arch/arm/boot/dts/qcom-msm8974-pm.dtsi | 69
>>>>> ++++++++++++++++++++++++++++++++++
>>>>>  arch/arm/boot/dts/qcom-msm8974.dtsi    | 10 +++--
>>>>>  2 files changed, 75 insertions(+), 4 deletions(-)
>>>>>  create mode 100644 arch/arm/boot/dts/qcom-msm8974-pm.dtsi
>>>>
>>>> <snip>
>>>>
>>>>> +};
>>>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> index 69dca2a..0580bc2 100644
>>>>> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> @@ -14,7 +14,7 @@
>>>>>          #size-cells = <0>;
>>>>>          interrupts = <1 9 0xf04>;
>>>>>
>>>>> -        cpu@0 {
>>>>> +        CPU0: cpu@0 {
>>>> Lina, Stephen boyd has sent some DT change for krait-cpufreq which
>>>> also
>>>> renames this node to "cpu0: cpu@0". If you both could sync up and
>>>> agree
>>>> on a common naming('cpu0' with caps or not caps) for this node.
>>>>
>>> Sure. Will work with Stephen on that.
>>>
>>
>> This doesn't seem like a big deal. I imagine Kumar can resolve the
>> conflict if the two patches merge at the same time.
>>
> I can use the lower case names, if thats common. I see that being used
> for referring to <&acc> in that file, but ofcourse <&L2> exists as well.
> Any preference?
>

No preference. Uppercase at least matches L2 and that matches what's in
the ePAPR so that seems nice.

Patch

diff --git a/arch/arm/boot/dts/qcom-msm8974-pm.dtsi b/arch/arm/boot/dts/qcom-msm8974-pm.dtsi
new file mode 100644
index 0000000..bbfb1d5
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-msm8974-pm.dtsi
@@ -0,0 +1,69 @@ 
+/* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+	spm@f9089000 {
+		compatible = "qcom,spm-v2.1";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0xf9089000 0x1000>;
+		qcom,cpu = <&CPU0>;
+		qcom,saw2-clk-div = <0x01>;
+		qcom,saw2-delays = <0x3C102800>;
+		qcom,saw2-enable = <0x01>;
+		qcom,saw2-spm-cmd-wfi = [03 0b 0f];
+		qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+			30 06 26 30 0F];
+	};
+
+	spm@f9099000 {
+		compatible = "qcom,spm-v2.1";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0xf9099000 0x1000>;
+		qcom,cpu = <&CPU1>;
+		qcom,saw2-clk-div = <0x01>;
+		qcom,saw2-delays = <0x3C102800>;
+		qcom,saw2-enable = <0x01>;
+		qcom,saw2-spm-cmd-wfi = [03 0b 0f];
+		qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+			30 06 26 30 0F];
+	};
+
+	spm@f90a9000 {
+		compatible = "qcom,spm-v2.1";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0xf90a9000 0x1000>;
+		qcom,cpu = <&CPU2>;
+		qcom,saw2-clk-div = <0x01>;
+		qcom,saw2-delays = <0x3C102800>;
+		qcom,saw2-enable = <0x01>;
+		qcom,saw2-spm-cmd-wfi = [03 0b 0f];
+		qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+			30 06 26 30 0F];
+	};
+
+	spm@f90b9000 {
+		compatible = "qcom,spm-v2.1";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0xf90b9000 0x1000>;
+		qcom,cpu = <&CPU3>;
+		qcom,saw2-clk-div = <0x01>;
+		qcom,saw2-delays = <0x3C102800>;
+		qcom,saw2-enable = <0x01>;
+		qcom,saw2-spm-cmd-wfi = [03 0b 0f];
+		qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
+			30 06 26 30 0F];
+	};
+};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 69dca2a..0580bc2 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -14,7 +14,7 @@ 
 		#size-cells = <0>;
 		interrupts = <1 9 0xf04>;
 
-		cpu@0 {
+		CPU0: cpu@0 {
 			compatible = "qcom,krait";
 			enable-method = "qcom,kpss-acc-v2";
 			device_type = "cpu";
@@ -23,7 +23,7 @@ 
 			qcom,acc = <&acc0>;
 		};
 
-		cpu@1 {
+		CPU1: cpu@1 {
 			compatible = "qcom,krait";
 			enable-method = "qcom,kpss-acc-v2";
 			device_type = "cpu";
@@ -32,7 +32,7 @@ 
 			qcom,acc = <&acc1>;
 		};
 
-		cpu@2 {
+		CPU2: cpu@2 {
 			compatible = "qcom,krait";
 			enable-method = "qcom,kpss-acc-v2";
 			device_type = "cpu";
@@ -41,7 +41,7 @@ 
 			qcom,acc = <&acc2>;
 		};
 
-		cpu@3 {
+		CPU3: cpu@3 {
 			compatible = "qcom,krait";
 			enable-method = "qcom,kpss-acc-v2";
 			device_type = "cpu";
@@ -238,3 +238,5 @@ 
 		};
 	};
 };
+
+#include "qcom-msm8974-pm.dtsi"