| Message ID | 1612527609-7053-1-git-send-email-Prike.Liang@amd.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v3] usb: pci-quirks: disable D3cold on xhci suspend for s2idle | expand |
On Fri, Feb 05, 2021 at 08:20:09PM +0800, Prike Liang wrote: > The XHCI is required enter D3hot rather than D3cold for AMD s2idle solution. > Otherwise, the 'Controller Not Ready' (CNR) bit not being cleared by host > in resume and eventually result in xhci resume failed in s2idle wakeup period. I do not understand this, can you perhaps rephrase it differently? Also, please mention the specific hardware that has this bug in the commit log, or on the subject line, as the subject line is saying that this change is needed for all devices, when really only one is broken. > > v1 -> v2: drop the XHCI_COMP_MODE_QUIRK quirk and create a new one for handling > XHCI D3cold. > > v2 -> v3: correct the quirk name typo XHCI_AMD_S2IDL_SUPPORT_QUIRK -> XHCI_AMD_S2IDLE_SUPPORT_QUIRK This goes below the --- line, as the documentation asks for. thanks, greg k-h
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index 3feaafe..6cd27b9 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -170,6 +170,10 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_1))) xhci->quirks |= XHCI_U2_DISABLE_WAKE; + if (pdev->vendor == PCI_VENDOR_ID_AMD && + pdev->device == 0x1639) + xhci->quirks |= XHCI_AMD_S2IDLE_SUPPORT_QUIRK; + if (pdev->vendor == PCI_VENDOR_ID_INTEL) { xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_INTEL_HOST; @@ -500,7 +504,7 @@ static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) * Systems with the TI redriver that loses port status change events * need to have the registers polled during D3, so avoid D3cold. */ - if (xhci->quirks & XHCI_COMP_MODE_QUIRK) + if (xhci->quirks & (XHCI_COMP_MODE_QUIRK | XHCI_AMD_S2IDLE_SUPPORT_QUIRK)) pci_d3cold_disable(pdev); if (xhci->quirks & XHCI_PME_STUCK_QUIRK) diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index ea1754f..ca69427 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1874,6 +1874,7 @@ struct xhci_hcd { #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) #define XHCI_RENESAS_FW_QUIRK BIT_ULL(36) +#define XHCI_AMD_S2IDLE_SUPPORT_QUIRK BIT_ULL(37) unsigned int num_active_eps; unsigned int limit_active_eps;
The XHCI is required enter D3hot rather than D3cold for AMD s2idle solution. Otherwise, the 'Controller Not Ready' (CNR) bit not being cleared by host in resume and eventually result in xhci resume failed in s2idle wakeup period. v1 -> v2: drop the XHCI_COMP_MODE_QUIRK quirk and create a new one for handling XHCI D3cold. v2 -> v3: correct the quirk name typo XHCI_AMD_S2IDL_SUPPORT_QUIRK -> XHCI_AMD_S2IDLE_SUPPORT_QUIRK Signed-off-by: Prike Liang <Prike.Liang@amd.com> --- drivers/usb/host/xhci-pci.c | 6 +++++- drivers/usb/host/xhci.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-)