Message ID | 20210225141022.7.Ifd7b86f826b18410eada75758a7bca1eebfa336d@changeid |
---|---|
State | New |
Headers | show |
Series | arm64: dts: qcom: Update sc7180-trogdor variants from downstream | expand |
On Thu, Feb 25, 2021 at 02:13:04PM -0800, Douglas Anderson wrote: > From: Alexandru M Stan <amstan@chromium.org> > > Removed the pinctrl and pin{mux,conf} for the control pins because: > 1. The only need for them is for userspace control via flash_fp_mcu > 2. cros-ec doesn't know what to do with them, and even if it did, > it would interfere with flash_fp_mcu at the most inopportune times > > Since we're not using hogs, we rely on AP firmware to set all the > control pins correctly. > > Cc: Stephen Boyd <swboyd@chromium.org> > Cc: Craig Hesling <hesling@chromium.org> > Signed-off-by: Alexandru M Stan <amstan@chromium.org> > [dianders: adjusted since coachz isn't upstream yet] > Signed-off-by: Douglas Anderson <dianders@chromium.org> We have essentially the same patch downstream, so I suppose the AP FW indeed takes care of configuring the FP pins as needed :) Reviewed-by; Matthias Kaehlcke <mka@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 69bf600e1c9f..12397e31bef6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -808,7 +808,7 @@ cros_ec_fp: ec@0 { interrupt-parent = <&tlmm>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; - pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>, <&fpmcu_sel>; + pinctrl-0 = <&fp_to_ap_irq_l>; spi-max-frequency = <3000000>; }; }; @@ -1233,48 +1233,6 @@ pinconf { }; }; - fpmcu_boot0: fpmcu-boot0 { - pinmux { - pins = "gpio10"; - function = "gpio"; - }; - - pinconf { - pins = "gpio10"; - bias-disable; - drive-strength = <2>; - output-low; - }; - }; - - fpmcu_sel: fpmcu-sel { - pinmux { - pins = "gpio22"; - function = "gpio"; - }; - - pinconf { - pins = "gpio22"; - bias-disable; - drive-strength = <2>; - output-high; - }; - }; - - fp_rst_l: fp-rst-l { - pinmux { - pins = "gpio5"; - function = "gpio"; - }; - - pinconf { - pins = "gpio5"; - bias-disable; - drive-strength = <2>; - output-high; - }; - }; - fp_to_ap_irq_l: fp-to-ap-irq-l { pinmux { pins = "gpio4"; @@ -1290,7 +1248,6 @@ pinconf { }; }; - h1_ap_int_odl: h1-ap-int-odl { pinmux { pins = "gpio42";