| Message ID | 8e901c23-65ad-d76d-5a05-11d9aa7c4fc3@omprussia.ru |
|---|---|
| State | New |
| Headers | show |
| Series | Fix TRSCER masks in the Ether driver | expand |
On Sun, Feb 28, 2021 at 9:54 PM Sergey Shtylyov <s.shtylyov@omprussia.ru> wrote: > According to the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware, > Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use > the driver's default TRSCER mask. Add the explicit initializer for > sh_eth_cpu_data::trscer_err_mask for R7S72100. > > Fixes: db893473d313 ("sh_eth: Add support for r7s72100") > Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Index: net/drivers/net/ethernet/renesas/sh_eth.c =================================================================== --- net.orig/drivers/net/ethernet/renesas/sh_eth.c +++ net/drivers/net/ethernet/renesas/sh_eth.c @@ -560,6 +560,8 @@ static struct sh_eth_cpu_data r7s72100_d EESR_TDE, .fdr_value = 0x0000070f, + .trscer_err_mask = DESC_I_RINT8 | DESC_I_RINT5, + .no_psr = 1, .apr = 1, .mpr = 1,
According to the RZ/A1H Group, RZ/A1M Group User's Manual: Hardware, Rev. 4.00, the TRSCER register has bit 9 reserved, hence we can't use the driver's default TRSCER mask. Add the explicit initializer for sh_eth_cpu_data::trscer_err_mask for R7S72100. Fixes: db893473d313 ("sh_eth: Add support for r7s72100") Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> --- drivers/net/ethernet/renesas/sh_eth.c | 2 ++ 1 file changed, 2 insertions(+)