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[209.132.180.131]) by mx.google.com with ESMTPS id xk2si9362207pbc.66.2014.10.20.17.57.51 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Oct 2014 17:57:52 -0700 (PDT) Received-SPF: pass (google.com: domain of gdb-patches-return-116853-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Received: (qmail 12570 invoked by alias); 21 Oct 2014 00:57:31 -0000 Mailing-List: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org Precedence: list List-Id: List-Unsubscribe: , List-Subscribe: List-Archive: List-Post: , List-Help: , Sender: gdb-patches-owner@sourceware.org Delivered-To: mailing list gdb-patches@sourceware.org Received: (qmail 12461 invoked by uid 89); 21 Oct 2014 00:57:31 -0000 X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f47.google.com Received: from mail-pa0-f47.google.com (HELO mail-pa0-f47.google.com) (209.85.220.47) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 21 Oct 2014 00:57:28 +0000 Received: by mail-pa0-f47.google.com with SMTP id kq14so209963pab.6 for ; Mon, 20 Oct 2014 17:57:26 -0700 (PDT) X-Received: by 10.69.18.139 with SMTP id gm11mr31592592pbd.104.1413853046878; Mon, 20 Oct 2014 17:57:26 -0700 (PDT) Received: from kamensky-w530.cisco.com.net ([24.6.79.41]) by mx.google.com with ESMTPSA id g15sm10230692pdm.68.2014.10.20.17.57.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 20 Oct 2014 17:57:26 -0700 (PDT) From: Victor Kamensky To: gdb-patches@sourceware.org Cc: victor.kamensky@linaro.org Subject: [PATCH 3/5] ARM: arm_breakpoint should be little endian form in case for arm BE8 Date: Mon, 20 Oct 2014 17:56:59 -0700 Message-Id: <1413853021-4393-4-git-send-email-victor.kamensky@linaro.org> In-Reply-To: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> References: <1413853021-4393-1-git-send-email-victor.kamensky@linaro.org> X-Original-Sender: victor.kamensky@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 2a00:1450:4010:c04::232 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=pass header.i=@sourceware.org X-Google-Group-Id: 836684582541 tdep->arm_breakpoint, tdep->thumb_breakpoint, tdep->thumb2_breakpoint should be set le_ variants in case of arm BE8 code. Those instruciton sequences are writen to target with simple write_memory, without regarding gdbarch_byte_order_for_code. But in BE8 case even data memory is in big endian form, instructions are still in little endian form. Because of this issue there are many issues while running gdb test case in armv7b mode. For example gdb.arch/arm-disp-step.exp test fails because it gets SIGILL when displaced instrucion sequence reaches break instruction, which is in wrong byte order. Solution is to set tdep->xxx_breakpoint sequences in BE8 case (i.e when gdbarch_byte_order_for_code is BFD_ENDIAN_BIG. --- gdb/ChangeLog | 5 +++++ gdb/arm-linux-tdep.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 2aef5dc..c32fb3f 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,10 @@ 2014-10-13 Victor Kamensky + * arm-tdep.c: (extract_arm_insn): use dbarch_byte_order_for_code + to read arm instruction. + +2014-10-13 Victor Kamensky + * arm-tdep.c (extract_arm_insn): use dbarch_byte_order_for_code to read arm instruction. diff --git a/gdb/arm-linux-tdep.c b/gdb/arm-linux-tdep.c index e3587f3..2e79658 100644 --- a/gdb/arm-linux-tdep.c +++ b/gdb/arm-linux-tdep.c @@ -1361,7 +1361,7 @@ arm_linux_init_abi (struct gdbarch_info info, linux_init_abi (info, gdbarch); tdep->lowest_pc = 0x8000; - if (info.byte_order == BFD_ENDIAN_BIG) + if (info.byte_order_for_code == BFD_ENDIAN_BIG) { if (tdep->arm_abi == ARM_ABI_AAPCS) tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint;