diff mbox series

[v3,4/6] mhi: pci_generic: No-Op for device_wake operations

Message ID 1614971808-22156-4-git-send-email-loic.poulain@linaro.org
State Accepted
Commit e3e5e6508fc1c0e98a5a264853713dd30a60e5e5
Headers show
Series [v3,1/6] mhi: pci_generic: Parametrable element count for events | expand

Commit Message

Loic Poulain March 5, 2021, 7:16 p.m. UTC
The wake_db register presence is highly speculative and can fuze MHI
devices. Indeed, currently the wake_db register address is defined at
entry 127 of the 'Channel doorbell array', thus writing to this address
is equivalent to ringing the doorbell for channel 127, causing trouble
with some devics (e.g. SDX24 based modems) that get an unexpected
channel 127 doorbell interrupt.

This change fixes that issue by setting wake get/put as no-op for
pci_generic devices. The wake device sideband mechanism seems really
specific to each device, and is AFAIK not defined by the MHI spec.

It also removes zeroing initialization of wake_db register during MMIO
initialization, the register being set via wake_get/put accessors few
cycles later during M0 transition.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

---
 v2: reword commit message
 v3: no change

 drivers/bus/mhi/core/init.c   |  2 --
 drivers/bus/mhi/pci_generic.c | 18 ++++++++++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)

-- 
2.7.4

Comments

Hemant Kumar March 5, 2021, 8:55 p.m. UTC | #1
Hi Loic,

On 3/5/21 11:16 AM, Loic Poulain wrote:
> The wake_db register presence is highly speculative and can fuze MHI

> devices. Indeed, currently the wake_db register address is defined at

> entry 127 of the 'Channel doorbell array', thus writing to this address

> is equivalent to ringing the doorbell for channel 127, causing trouble

> with some devics (e.g. SDX24 based modems) that get an unexpected

> channel 127 doorbell interrupt.

> 

> This change fixes that issue by setting wake get/put as no-op for

> pci_generic devices. The wake device sideband mechanism seems really

> specific to each device, and is AFAIK not defined by the MHI spec.

> 

> It also removes zeroing initialization of wake_db register during MMIO

> initialization, the register being set via wake_get/put accessors few

> cycles later during M0 transition.

> 

> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

> ---

>   v2: reword commit message

>   v3: no change

> 

>   drivers/bus/mhi/core/init.c   |  2 --

>   drivers/bus/mhi/pci_generic.c | 18 ++++++++++++++++++

>   2 files changed, 18 insertions(+), 2 deletions(-)

> 

> diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c

> index 2159dbc..32eb90f 100644

> --- a/drivers/bus/mhi/core/init.c

> +++ b/drivers/bus/mhi/core/init.c

> @@ -510,8 +510,6 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl)

>   

>   	/* Setup wake db */

>   	mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB);

> -	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 4, 0);

> -	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 0, 0);

Did you see any issue with host clearing wake DB register. it looks fine 
to clear it by host without relying on what device had it before, to 
begin with.

>   	mhi_cntrl->wake_set = false;

>   


Thanks,
Hemant
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
Manivannan Sadhasivam March 10, 2021, 1:29 p.m. UTC | #2
On Fri, Mar 05, 2021 at 08:16:46PM +0100, Loic Poulain wrote:
> The wake_db register presence is highly speculative and can fuze MHI

> devices. Indeed, currently the wake_db register address is defined at

> entry 127 of the 'Channel doorbell array', thus writing to this address

> is equivalent to ringing the doorbell for channel 127, causing trouble

> with some devics (e.g. SDX24 based modems) that get an unexpected

> channel 127 doorbell interrupt.

> 

> This change fixes that issue by setting wake get/put as no-op for

> pci_generic devices. The wake device sideband mechanism seems really

> specific to each device, and is AFAIK not defined by the MHI spec.

> 

> It also removes zeroing initialization of wake_db register during MMIO

> initialization, the register being set via wake_get/put accessors few

> cycles later during M0 transition.

> 

> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>


Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>


Thanks,
Mani

> ---

>  v2: reword commit message

>  v3: no change

> 

>  drivers/bus/mhi/core/init.c   |  2 --

>  drivers/bus/mhi/pci_generic.c | 18 ++++++++++++++++++

>  2 files changed, 18 insertions(+), 2 deletions(-)

> 

> diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c

> index 2159dbc..32eb90f 100644

> --- a/drivers/bus/mhi/core/init.c

> +++ b/drivers/bus/mhi/core/init.c

> @@ -510,8 +510,6 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl)

>  

>  	/* Setup wake db */

>  	mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB);

> -	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 4, 0);

> -	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 0, 0);


I'm okay with the change since this is not documented anywhere. And if this is
required for any cases, can be done in the controller driver later.

>  	mhi_cntrl->wake_set = false;

>  

>  	/* Setup channel db address for each channel in tre_ring */

> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c

> index c274e65..4685a83 100644

> --- a/drivers/bus/mhi/pci_generic.c

> +++ b/drivers/bus/mhi/pci_generic.c

> @@ -312,6 +312,21 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl,

>  	}

>  }

>  

> +static void mhi_pci_wake_get_nop(struct mhi_controller *mhi_cntrl, bool force)

> +{

> +	/* no-op */

> +}

> +

> +static void mhi_pci_wake_put_nop(struct mhi_controller *mhi_cntrl, bool override)

> +{

> +	/* no-op */

> +}

> +

> +static void mhi_pci_wake_toggle_nop(struct mhi_controller *mhi_cntrl)

> +{

> +	/* no-op */

> +}

> +

>  static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl)

>  {

>  	struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);

> @@ -515,6 +530,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)

>  	mhi_cntrl->status_cb = mhi_pci_status_cb;

>  	mhi_cntrl->runtime_get = mhi_pci_runtime_get;

>  	mhi_cntrl->runtime_put = mhi_pci_runtime_put;

> +	mhi_cntrl->wake_get = mhi_pci_wake_get_nop;

> +	mhi_cntrl->wake_put = mhi_pci_wake_put_nop;

> +	mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop;

>  

>  	err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width));

>  	if (err)

> -- 

> 2.7.4

>
Manivannan Sadhasivam March 10, 2021, 1:37 p.m. UTC | #3
On Fri, Mar 05, 2021 at 08:16:46PM +0100, Loic Poulain wrote:
> The wake_db register presence is highly speculative and can fuze MHI

> devices. Indeed, currently the wake_db register address is defined at

> entry 127 of the 'Channel doorbell array', thus writing to this address

> is equivalent to ringing the doorbell for channel 127, causing trouble

> with some devics (e.g. SDX24 based modems) that get an unexpected

> channel 127 doorbell interrupt.

> 

> This change fixes that issue by setting wake get/put as no-op for

> pci_generic devices. The wake device sideband mechanism seems really

> specific to each device, and is AFAIK not defined by the MHI spec.

> 

> It also removes zeroing initialization of wake_db register during MMIO

> initialization, the register being set via wake_get/put accessors few

> cycles later during M0 transition.

> 

> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>


Applied to mhi-next!

Thanks,
Mani

> ---

>  v2: reword commit message

>  v3: no change

> 

>  drivers/bus/mhi/core/init.c   |  2 --

>  drivers/bus/mhi/pci_generic.c | 18 ++++++++++++++++++

>  2 files changed, 18 insertions(+), 2 deletions(-)

> 

> diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c

> index 2159dbc..32eb90f 100644

> --- a/drivers/bus/mhi/core/init.c

> +++ b/drivers/bus/mhi/core/init.c

> @@ -510,8 +510,6 @@ int mhi_init_mmio(struct mhi_controller *mhi_cntrl)

>  

>  	/* Setup wake db */

>  	mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB);

> -	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 4, 0);

> -	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 0, 0);

>  	mhi_cntrl->wake_set = false;

>  

>  	/* Setup channel db address for each channel in tre_ring */

> diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c

> index c274e65..4685a83 100644

> --- a/drivers/bus/mhi/pci_generic.c

> +++ b/drivers/bus/mhi/pci_generic.c

> @@ -312,6 +312,21 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl,

>  	}

>  }

>  

> +static void mhi_pci_wake_get_nop(struct mhi_controller *mhi_cntrl, bool force)

> +{

> +	/* no-op */

> +}

> +

> +static void mhi_pci_wake_put_nop(struct mhi_controller *mhi_cntrl, bool override)

> +{

> +	/* no-op */

> +}

> +

> +static void mhi_pci_wake_toggle_nop(struct mhi_controller *mhi_cntrl)

> +{

> +	/* no-op */

> +}

> +

>  static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl)

>  {

>  	struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);

> @@ -515,6 +530,9 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)

>  	mhi_cntrl->status_cb = mhi_pci_status_cb;

>  	mhi_cntrl->runtime_get = mhi_pci_runtime_get;

>  	mhi_cntrl->runtime_put = mhi_pci_runtime_put;

> +	mhi_cntrl->wake_get = mhi_pci_wake_get_nop;

> +	mhi_cntrl->wake_put = mhi_pci_wake_put_nop;

> +	mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop;

>  

>  	err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width));

>  	if (err)

> -- 

> 2.7.4

>
diff mbox series

Patch

diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c
index 2159dbc..32eb90f 100644
--- a/drivers/bus/mhi/core/init.c
+++ b/drivers/bus/mhi/core/init.c
@@ -510,8 +510,6 @@  int mhi_init_mmio(struct mhi_controller *mhi_cntrl)
 
 	/* Setup wake db */
 	mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB);
-	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 4, 0);
-	mhi_write_reg(mhi_cntrl, mhi_cntrl->wake_db, 0, 0);
 	mhi_cntrl->wake_set = false;
 
 	/* Setup channel db address for each channel in tre_ring */
diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c
index c274e65..4685a83 100644
--- a/drivers/bus/mhi/pci_generic.c
+++ b/drivers/bus/mhi/pci_generic.c
@@ -312,6 +312,21 @@  static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl,
 	}
 }
 
+static void mhi_pci_wake_get_nop(struct mhi_controller *mhi_cntrl, bool force)
+{
+	/* no-op */
+}
+
+static void mhi_pci_wake_put_nop(struct mhi_controller *mhi_cntrl, bool override)
+{
+	/* no-op */
+}
+
+static void mhi_pci_wake_toggle_nop(struct mhi_controller *mhi_cntrl)
+{
+	/* no-op */
+}
+
 static bool mhi_pci_is_alive(struct mhi_controller *mhi_cntrl)
 {
 	struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
@@ -515,6 +530,9 @@  static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	mhi_cntrl->status_cb = mhi_pci_status_cb;
 	mhi_cntrl->runtime_get = mhi_pci_runtime_get;
 	mhi_cntrl->runtime_put = mhi_pci_runtime_put;
+	mhi_cntrl->wake_get = mhi_pci_wake_get_nop;
+	mhi_cntrl->wake_put = mhi_pci_wake_put_nop;
+	mhi_cntrl->wake_toggle = mhi_pci_wake_toggle_nop;
 
 	err = mhi_pci_claim(mhi_cntrl, info->bar_num, DMA_BIT_MASK(info->dma_data_width));
 	if (err)