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[05/14] dt-bindings: timer: nuvoton,npcm7xx: Add wpcm450-timer

Message ID 20210320181610.680870-6-j.neuschaefer@gmx.net
State Accepted
Commit 8120891105ba32b45bc35f7dc07e6d87a8314556
Headers show
Series Initial support for Nuvoton WPCM450 BMC SoC | expand

Commit Message

Jonathan Neuschäfer March 20, 2021, 6:16 p.m. UTC 
Add a compatible string for WPCM450, which has essentially the same
timer controller.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
 .../devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt        | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--
2.30.2

Comments

Rob Herring March 27, 2021, 4:39 p.m. UTC | #1 
On Sat, 20 Mar 2021 19:16:01 +0100, Jonathan Neuschäfer wrote:
> Add a compatible string for WPCM450, which has essentially the same

> timer controller.

> 

> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

> ---

>  .../devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt        | 3 ++-

>  1 file changed, 2 insertions(+), 1 deletion(-)

> 


Acked-by: Rob Herring <robh@kernel.org>
Daniel Lezcano April 4, 2021, 8:28 p.m. UTC | #2 
On 20/03/2021 19:16, Jonathan Neuschäfer wrote:
> Add a compatible string for WPCM450, which has essentially the same

> timer controller.

> 

> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

> ---


Applied, thanks


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diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
index 97258f1a1505b..ac3a5e887455d 100644
--- a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
+++ b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.txt
@@ -4,7 +4,8 @@  Nuvoton NPCM7xx have three timer modules, each timer module provides five 24-bit
 timer counters.

 Required properties:
-- compatible      : "nuvoton,npcm750-timer" for Poleg NPCM750.
+- compatible      : "nuvoton,npcm750-timer" for Poleg NPCM750, or
+                    "nuvoton,wpcm450-timer" for Hermon WPCM450.
 - reg             : Offset and length of the register set for the device.
 - interrupts      : Contain the timer interrupt of timer 0.
 - clocks          : phandle of timer reference clock (usually a 25 MHz clock).