diff mbox series

[v5,6/7] arm64: dts: qcom: sm8250: switch usb1 qmp phy to USB3+DP mode

Message ID 20210328205257.3348866-7-dmitry.baryshkov@linaro.org
State Superseded
Headers show
Series [v5,1/7] dt-bindings: phy: qcom,qmp-usb3-dp-phy: move usb3 compatibles back to qcom,qmp-phy.yaml | expand

Commit Message

Dmitry Baryshkov March 28, 2021, 8:52 p.m. UTC
USB1 QMP PHY is not just a USB3 PHY, but USB3+DP PHY. Change device tree
nodes accordingly.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

Comments

Bjorn Andersson March 30, 2021, 3:32 a.m. UTC | #1
On Sun 28 Mar 15:52 CDT 2021, Dmitry Baryshkov wrote:

> USB1 QMP PHY is not just a USB3 PHY, but USB3+DP PHY. Change device tree

> nodes accordingly.

> 

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>


Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>


@Vinod, will you let me know when you've picked the driver changes so I
can pick the two DT patches?

Regards,
Bjorn

> ---

>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 23 ++++++++++++++++++-----

>  1 file changed, 18 insertions(+), 5 deletions(-)

> 

> diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi

> index 947e1accae3a..0f79e6885004 100644

> --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi

> +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi

> @@ -2097,12 +2097,11 @@ usb_2_hsphy: phy@88e4000 {

>  		};

>  

>  		usb_1_qmpphy: phy@88e9000 {

> -			compatible = "qcom,sm8250-qmp-usb3-phy";

> +			compatible = "qcom,sm8250-qmp-usb3-dp-phy";

>  			reg = <0 0x088e9000 0 0x200>,

> -			      <0 0x088e8000 0 0x20>;

> -			reg-names = "reg-base", "dp_com";

> +			      <0 0x088e8000 0 0x40>,

> +			      <0 0x088ea000 0 0x200>;

>  			status = "disabled";

> -			#clock-cells = <1>;

>  			#address-cells = <2>;

>  			#size-cells = <2>;

>  			ranges;

> @@ -2116,7 +2115,7 @@ usb_1_qmpphy: phy@88e9000 {

>  				 <&gcc GCC_USB3_PHY_PRIM_BCR>;

>  			reset-names = "phy", "common";

>  

> -			usb_1_ssphy: lanes@88e9200 {

> +			usb_1_ssphy: usb3-phy@88e9200 {

>  				reg = <0 0x088e9200 0 0x200>,

>  				      <0 0x088e9400 0 0x200>,

>  				      <0 0x088e9c00 0 0x400>,

> @@ -2128,6 +2127,20 @@ usb_1_ssphy: lanes@88e9200 {

>  				clock-names = "pipe0";

>  				clock-output-names = "usb3_phy_pipe_clk_src";

>  			};

> +

> +			dp_phy: dp-phy@88ea200 {

> +				reg = <0 0x088ea200 0 0x200>,

> +				      <0 0x088ea400 0 0x200>,

> +				      <0 0x088eac00 0 0x400>,

> +				      <0 0x088ea600 0 0x200>,

> +				      <0 0x088ea800 0 0x200>,

> +				      <0 0x088eaa00 0 0x100>;

> +				#phy-cells = <0>;

> +				#clock-cells = <1>;

> +				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;

> +				clock-names = "pipe0";

> +				clock-output-names = "usb3_phy_pipe_clk_src";

> +			};

>  		};

>  

>  		usb_2_qmpphy: phy@88eb000 {

> -- 

> 2.30.2

>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 947e1accae3a..0f79e6885004 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2097,12 +2097,11 @@  usb_2_hsphy: phy@88e4000 {
 		};
 
 		usb_1_qmpphy: phy@88e9000 {
-			compatible = "qcom,sm8250-qmp-usb3-phy";
+			compatible = "qcom,sm8250-qmp-usb3-dp-phy";
 			reg = <0 0x088e9000 0 0x200>,
-			      <0 0x088e8000 0 0x20>;
-			reg-names = "reg-base", "dp_com";
+			      <0 0x088e8000 0 0x40>,
+			      <0 0x088ea000 0 0x200>;
 			status = "disabled";
-			#clock-cells = <1>;
 			#address-cells = <2>;
 			#size-cells = <2>;
 			ranges;
@@ -2116,7 +2115,7 @@  usb_1_qmpphy: phy@88e9000 {
 				 <&gcc GCC_USB3_PHY_PRIM_BCR>;
 			reset-names = "phy", "common";
 
-			usb_1_ssphy: lanes@88e9200 {
+			usb_1_ssphy: usb3-phy@88e9200 {
 				reg = <0 0x088e9200 0 0x200>,
 				      <0 0x088e9400 0 0x200>,
 				      <0 0x088e9c00 0 0x400>,
@@ -2128,6 +2127,20 @@  usb_1_ssphy: lanes@88e9200 {
 				clock-names = "pipe0";
 				clock-output-names = "usb3_phy_pipe_clk_src";
 			};
+
+			dp_phy: dp-phy@88ea200 {
+				reg = <0 0x088ea200 0 0x200>,
+				      <0 0x088ea400 0 0x200>,
+				      <0 0x088eac00 0 0x400>,
+				      <0 0x088ea600 0 0x200>,
+				      <0 0x088ea800 0 0x200>,
+				      <0 0x088eaa00 0 0x100>;
+				#phy-cells = <0>;
+				#clock-cells = <1>;
+				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+				clock-names = "pipe0";
+				clock-output-names = "usb3_phy_pipe_clk_src";
+			};
 		};
 
 		usb_2_qmpphy: phy@88eb000 {