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[209.132.180.67]) by mx.google.com with ESMTP id xx4si6144331pab.33.2015.02.09.23.50.50; Mon, 09 Feb 2015 23:50:52 -0800 (PST) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752658AbbBJHut (ORCPT + 5 others); Tue, 10 Feb 2015 02:50:49 -0500 Received: from mail-pd0-f177.google.com ([209.85.192.177]:37165 "EHLO mail-pd0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752250AbbBJHur (ORCPT ); Tue, 10 Feb 2015 02:50:47 -0500 Received: by pdbfl12 with SMTP id fl12so12624208pdb.4 for ; Mon, 09 Feb 2015 23:50:47 -0800 (PST) X-Received: by 10.66.152.166 with SMTP id uz6mr2730063pab.61.1423554646968; Mon, 09 Feb 2015 23:50:46 -0800 (PST) Received: from linaro.solutionip.com ([210.177.145.245]) by mx.google.com with ESMTPSA id sf7sm14287307pbc.29.2015.02.09.23.50.42 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 09 Feb 2015 23:50:45 -0800 (PST) From: Zhangfei Gao To: balbi@ti.com, john.youn@synopsys.com, Mian Yousaf Kaukab , "dan . zhao" , Wangbinghui , Peter Chen , Sergei Shtylyov Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Zhangfei Gao Subject: [PATCH v3 2/5] Documentation: dt-bindings: add dt binding info for hi6220 Date: Tue, 10 Feb 2015 15:50:24 +0800 Message-Id: <1423554627-694-3-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1423554627-694-1-git-send-email-zhangfei.gao@linaro.org> References: <1423554627-694-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Signed-off-by: Zhangfei Gao --- .../devicetree/bindings/usb/hi6220-usb.txt | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/hi6220-usb.txt diff --git a/Documentation/devicetree/bindings/usb/hi6220-usb.txt b/Documentation/devicetree/bindings/usb/hi6220-usb.txt new file mode 100644 index 0000000..b8278de --- /dev/null +++ b/Documentation/devicetree/bindings/usb/hi6220-usb.txt @@ -0,0 +1,49 @@ +Hisilicon hi6220 SoC USB controller +----------------------------- + +usb controller is inherited from dwc2, refer dwc2.txt +----- + +Required properties: +- compatible: "hisilicon,hi6220-usb" +Refer to dwc2.txt for dwc2 usb properties + + +PHY: +----- + +Required properties: +- compatible: "hisilicon,hi6220-usb-phy" +- vcc-supply: phandle to the regulator that provides power to the PHY. +- clocks: phandle and clock specifier of the PHY clock. +- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. +- hisilicon,gpio-vbus: gpio of detecting vbus. +- hisilicon,gpio-id: gpio of detecting id. + +Example: + + peripheral_ctrl: syscon@f7030000 { + compatible = "syscon"; + reg = <0x0 0xf7030000 0x0 0x1000>; + }; + + usb2_phy: usbphy { + compatible = "hisilicon,hi6220-usb-phy"; + vcc-supply = <&fixed_5v_hub>; + hisilicon,gpio-vbus = <&gpio2 6 0>; + hisilicon,gpio-id = <&gpio2 5 0>; + hisilicon,peripheral-syscon = <&peripheral_ctrl>; + clocks = <&clock_sys HI6220_USBOTG_HCLK>; + }; + + usb: usb@f72c0000 { + compatible = "hisilicon,hi6220-usb"; + reg = <0x0 0xf72c0000 0x0 0x40000>; + phys = <&usb2_phy>; + dr_mode = "otg"; + g-use-dma; + g-rx-fifo-size = <512>; + g-np-tx-fifo-size = <128>; + g-tx-fifo-size = <128>; + interrupts = <0 77 0x4>; + };