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[85.214.87.163]) by mx.google.com with ESMTP id v12si41866871wjw.204.2015.02.19.08.21.00; Thu, 19 Feb 2015 08:21:01 -0800 (PST) Received-SPF: none (google.com: u-boot-bounces@lists.denx.de does not designate permitted sender hosts) client-ip=85.214.87.163; Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 868734B7B6; Thu, 19 Feb 2015 17:20:23 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mPA3SItfDcyf; Thu, 19 Feb 2015 17:20:23 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 12BD04B7AE; Thu, 19 Feb 2015 17:20:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AE1F44B7AE for ; Thu, 19 Feb 2015 17:19:55 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id sBrBEAmZIwyb for ; Thu, 19 Feb 2015 17:19:55 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f174.google.com (mail-lb0-f174.google.com [209.85.217.174]) by theia.denx.de (Postfix) with ESMTPS id 6C4E44B7AD for ; Thu, 19 Feb 2015 17:19:50 +0100 (CET) Received: by lbvp9 with SMTP id p9so844301lbv.3 for ; Thu, 19 Feb 2015 08:19:50 -0800 (PST) X-Received: by 10.112.26.165 with SMTP id m5mr4590475lbg.61.1424362789939; Thu, 19 Feb 2015 08:19:49 -0800 (PST) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id n8sm4916742lbd.1.2015.02.19.08.19.47 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Feb 2015 08:19:48 -0800 (PST) From: Linus Walleij To: u-boot@lists.denx.de, Albert Aribaud , Tom Rini Date: Thu, 19 Feb 2015 17:19:37 +0100 Message-Id: <1424362777-31691-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.3 Cc: Steve Rae , u-boot-review@google.com Subject: [U-Boot] [PATCH 1/2] vexpress64: juno: add NOR flash detection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This enables the vexpress64 to detect its NOR flash so that we can load kernel etc from it. Signed-off-by: Linus Walleij --- include/configs/vexpress_aemv8a.h | 41 ++++++++++++++++++++++----------------- 1 file changed, 23 insertions(+), 18 deletions(-) diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 5ffc84dc5ecd..bcfcb63d81d8 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -29,8 +29,6 @@ /*#define CONFIG_ARMV8_SWITCH_TO_EL1*/ -#define CONFIG_SYS_NO_FLASH - #define CONFIG_SUPPORT_RAW_INITRD /* Cache Definitions */ @@ -56,14 +54,6 @@ /* Flat Device Tree Definitions */ #define CONFIG_OF_LIBFDT -/* CS register bases for the original memory map. */ -#define V2M_PA_CS0 0x00000000 -#define V2M_PA_CS1 0x14000000 -#define V2M_PA_CS2 0x18000000 -#define V2M_PA_CS3 0x1c000000 -#define V2M_PA_CS4 0x0c000000 -#define V2M_PA_CS5 0x10000000 - #define V2M_PERIPH_OFFSET(x) (x << 16) #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1)) #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2)) @@ -71,13 +61,6 @@ #define V2M_BASE 0x80000000 -/* - * Physical addresses, offset from V2M_PA_CS0-3 - */ -#define V2M_NOR0 (V2M_PA_CS0) -#define V2M_NOR1 (V2M_PA_CS4) -#define V2M_SRAM (V2M_PA_CS1) - /* Common peripherals relative to CS7. */ #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4)) #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5)) @@ -175,7 +158,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_PXE #define CONFIG_CMD_ENV -#define CONFIG_CMD_FLASH #define CONFIG_CMD_IMI #define CONFIG_CMD_LOADB #define CONFIG_CMD_MEMORY @@ -258,4 +240,27 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_MAXARGS 64 /* max command args */ +/* Flash memory is available on the Juno board only */ +#ifndef CONFIG_TARGET_VEXPRESS64_JUNO +#define CONFIG_SYS_NO_FLASH +#else +#define CONFIG_CMD_FLASH +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_BASE 0x08000000 +#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 + +/* Timeout values in ticks */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ + +/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */ +#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ +#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ +#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ + +#endif + #endif /* __VEXPRESS_AEMV8A_H */