diff mbox series

[2/2] arch: arm64: dts: msm8996: Add CPU opps

Message ID 20210527194455.782108-2-konrad.dybcio@somainline.org
State New
Headers show
Series [1/2] arch: arm64: dts: msm8996: Rename speedbin node | expand

Commit Message

Konrad Dybcio May 27, 2021, 7:44 p.m. UTC
From: Loic Poulain <loic.poulain@linaro.org>


Add the operating points capabilities of the kryo CPUs, that can be
used for frequency scaling. There are two differents operating point
tables, one for the big cluster and one for the LITTLE cluster.

This frequency scaling support can then be used as a passive cooling
device (cpufreq cooling device).

Only add nominal fmax for now, since there is no dynamic control of
VDD APC (s11..) which is statically set at its nominal value.

Original patch link: https://patchwork.kernel.org/project/linux-arm-msm/patch/1595253740-29466-6-git-send-email-loic.poulain@linaro.org/

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

[konrad: drop the thermals part, rebase and remove spaces within <>]
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>

---
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 234 ++++++++++++++++++++++++++
 1 file changed, 234 insertions(+)

-- 
2.31.1

Comments

Bjorn Andersson May 28, 2021, 2:51 a.m. UTC | #1
On Thu 27 May 14:44 CDT 2021, Konrad Dybcio wrote:

> From: Loic Poulain <loic.poulain@linaro.org>

> 

> Add the operating points capabilities of the kryo CPUs, that can be

> used for frequency scaling. There are two differents operating point

> tables, one for the big cluster and one for the LITTLE cluster.

> 

> This frequency scaling support can then be used as a passive cooling

> device (cpufreq cooling device).

> 

> Only add nominal fmax for now, since there is no dynamic control of

> VDD APC (s11..) which is statically set at its nominal value.

> 

> Original patch link: https://patchwork.kernel.org/project/linux-arm-msm/patch/1595253740-29466-6-git-send-email-loic.poulain@linaro.org/

> 

> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

> [konrad: drop the thermals part, rebase and remove spaces within <>]

> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>


As reported to Konrad on IRC, booting this causes a lockup before the
kernel reaches init, on one of my db820c boards. Booting with powersave
governor makes this board boot fine and I'm able to switch to
performance after that and at least according to cpufreq we're at full
speed on all 4 cores. But I haven't done any proper stress of the
system to narrow it down further...

PS. This was tested with next-20210527, your 3 patches, defconfig and
CONFIG_QCOM_CLK_APCC_MSM8996=y

Regards,
Bjorn

> ---

>  arch/arm64/boot/dts/qcom/msm8996.dtsi | 234 ++++++++++++++++++++++++++

>  1 file changed, 234 insertions(+)

> 

> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi

> index 509d5bfec8ad..10e6fecc9e13 100644

> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi

> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi

> @@ -8,6 +8,7 @@

>  #include <dt-bindings/clock/qcom,rpmcc.h>

>  #include <dt-bindings/power/qcom-rpmpd.h>

>  #include <dt-bindings/soc/qcom,apr.h>

> +#include <dt-bindings/thermal/thermal.h>

>  

>  / {

>  	interrupt-parent = <&intc>;

> @@ -44,6 +45,9 @@ CPU0: cpu@0 {

>  			enable-method = "psci";

>  			cpu-idle-states = <&CPU_SLEEP_0>;

>  			capacity-dmips-mhz = <1024>;

> +			clocks = <&kryocc 0>;

> +			operating-points-v2 = <&cluster0_opp>;

> +			#cooling-cells = <2>;

>  			next-level-cache = <&L2_0>;

>  			L2_0: l2-cache {

>  			      compatible = "cache";

> @@ -58,6 +62,9 @@ CPU1: cpu@1 {

>  			enable-method = "psci";

>  			cpu-idle-states = <&CPU_SLEEP_0>;

>  			capacity-dmips-mhz = <1024>;

> +			clocks = <&kryocc 0>;

> +			operating-points-v2 = <&cluster0_opp>;

> +			#cooling-cells = <2>;

>  			next-level-cache = <&L2_0>;

>  		};

>  

> @@ -68,6 +75,9 @@ CPU2: cpu@100 {

>  			enable-method = "psci";

>  			cpu-idle-states = <&CPU_SLEEP_0>;

>  			capacity-dmips-mhz = <1024>;

> +			clocks = <&kryocc 1>;

> +			operating-points-v2 = <&cluster1_opp>;

> +			#cooling-cells = <2>;

>  			next-level-cache = <&L2_1>;

>  			L2_1: l2-cache {

>  			      compatible = "cache";

> @@ -82,6 +92,9 @@ CPU3: cpu@101 {

>  			enable-method = "psci";

>  			cpu-idle-states = <&CPU_SLEEP_0>;

>  			capacity-dmips-mhz = <1024>;

> +			clocks = <&kryocc 1>;

> +			operating-points-v2 = <&cluster1_opp>;

> +			#cooling-cells = <2>;

>  			next-level-cache = <&L2_1>;

>  		};

>  

> @@ -121,6 +134,227 @@ CPU_SLEEP_0: cpu-sleep-0 {

>  		};

>  	};

>  

> +	cluster0_opp: opp_table0 {

> +		compatible = "operating-points-v2-kryo-cpu";

> +		nvmem-cells = <&speedbin_efuse>;

> +		opp-shared;

> +

> +		/* Nominal fmax for now */

> +		opp-307200000 {

> +			opp-hz = /bits/ 64 <307200000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-422400000 {

> +			opp-hz = /bits/ 64 <422400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-480000000 {

> +			opp-hz = /bits/ 64 <480000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-556800000 {

> +			opp-hz = /bits/ 64 <556800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-652800000 {

> +			opp-hz = /bits/ 64 <652800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-729600000 {

> +			opp-hz = /bits/ 64 <729600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-844800000 {

> +			opp-hz = /bits/ 64 <844800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-960000000 {

> +			opp-hz = /bits/ 64 <960000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1036800000 {

> +			opp-hz = /bits/ 64 <1036800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1113600000 {

> +			opp-hz = /bits/ 64 <1113600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1190400000 {

> +			opp-hz = /bits/ 64 <1190400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1228800000 {

> +			opp-hz = /bits/ 64 <1228800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1324800000 {

> +			opp-hz = /bits/ 64 <1324800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1401600000 {

> +			opp-hz = /bits/ 64 <1401600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1478400000 {

> +			opp-hz = /bits/ 64 <1478400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1593600000 {

> +			opp-hz = /bits/ 64 <1593600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +	};

> +

> +	cluster1_opp: opp_table1 {

> +		compatible = "operating-points-v2-kryo-cpu";

> +		nvmem-cells = <&speedbin_efuse>;

> +		opp-shared;

> +

> +		/* Nominal fmax for now */

> +		opp-307200000 {

> +			opp-hz = /bits/ 64 <307200000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-403200000 {

> +			opp-hz = /bits/ 64 <403200000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-480000000 {

> +			opp-hz = /bits/ 64 <480000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-556800000 {

> +			opp-hz = /bits/ 64 <556800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-652800000 {

> +			opp-hz = /bits/ 64 <652800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-729600000 {

> +			opp-hz = /bits/ 64 <729600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-806400000 {

> +			opp-hz = /bits/ 64 <806400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-883200000 {

> +			opp-hz = /bits/ 64 <883200000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-940800000 {

> +			opp-hz = /bits/ 64 <940800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1036800000 {

> +			opp-hz = /bits/ 64 <1036800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1113600000 {

> +			opp-hz = /bits/ 64 <1113600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1190400000 {

> +			opp-hz = /bits/ 64 <1190400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1248000000 {

> +			opp-hz = /bits/ 64 <1248000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1324800000 {

> +			opp-hz = /bits/ 64 <1324800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1401600000 {

> +			opp-hz = /bits/ 64 <1401600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1478400000 {

> +			opp-hz = /bits/ 64 <1478400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1555200000 {

> +			opp-hz = /bits/ 64 <1555200000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1632000000 {

> +			opp-hz = /bits/ 64 <1632000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1708800000 {

> +			opp-hz = /bits/ 64 <1708800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1785600000 {

> +			opp-hz = /bits/ 64 <1785600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1824000000 {

> +			opp-hz = /bits/ 64 <1824000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1920000000 {

> +			opp-hz = /bits/ 64 <1920000000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-1996800000 {

> +			opp-hz = /bits/ 64 <1996800000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-2073600000 {

> +			opp-hz = /bits/ 64 <2073600000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +		opp-2150400000 {

> +			opp-hz = /bits/ 64 <2150400000>;

> +			opp-supported-hw = <0x77>;

> +			clock-latency-ns = <200000>;

> +		};

> +	};

> +

>  	firmware {

>  		scm {

>  			compatible = "qcom,scm-msm8996";

> -- 

> 2.31.1

>
Bjorn Andersson May 31, 2021, 4:48 p.m. UTC | #2
On Thu 27 May 21:51 CDT 2021, Bjorn Andersson wrote:

> On Thu 27 May 14:44 CDT 2021, Konrad Dybcio wrote:

> 

> > From: Loic Poulain <loic.poulain@linaro.org>

> > 

> > Add the operating points capabilities of the kryo CPUs, that can be

> > used for frequency scaling. There are two differents operating point

> > tables, one for the big cluster and one for the LITTLE cluster.

> > 

> > This frequency scaling support can then be used as a passive cooling

> > device (cpufreq cooling device).

> > 

> > Only add nominal fmax for now, since there is no dynamic control of

> > VDD APC (s11..) which is statically set at its nominal value.

> > 

> > Original patch link: https://patchwork.kernel.org/project/linux-arm-msm/patch/1595253740-29466-6-git-send-email-loic.poulain@linaro.org/

> > 

> > Signed-off-by: Loic Poulain <loic.poulain@linaro.org>

> > [konrad: drop the thermals part, rebase and remove spaces within <>]

> > Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>

> 

> As reported to Konrad on IRC, booting this causes a lockup before the

> kernel reaches init, on one of my db820c boards. Booting with powersave

> governor makes this board boot fine and I'm able to switch to

> performance after that and at least according to cpufreq we're at full

> speed on all 4 cores. But I haven't done any proper stress of the

> system to narrow it down further...

> 

> PS. This was tested with next-20210527, your 3 patches, defconfig and

> CONFIG_QCOM_CLK_APCC_MSM8996=y

> 


Again as noted on IRC, I reflashed the boot and tz firmware on my db820c
and am now able to boot my board with these patches.

Regards,
Bjorn

> Regards,

> Bjorn

> 

> > ---

> >  arch/arm64/boot/dts/qcom/msm8996.dtsi | 234 ++++++++++++++++++++++++++

> >  1 file changed, 234 insertions(+)

> > 

> > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi

> > index 509d5bfec8ad..10e6fecc9e13 100644

> > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi

> > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi

> > @@ -8,6 +8,7 @@

> >  #include <dt-bindings/clock/qcom,rpmcc.h>

> >  #include <dt-bindings/power/qcom-rpmpd.h>

> >  #include <dt-bindings/soc/qcom,apr.h>

> > +#include <dt-bindings/thermal/thermal.h>

> >  

> >  / {

> >  	interrupt-parent = <&intc>;

> > @@ -44,6 +45,9 @@ CPU0: cpu@0 {

> >  			enable-method = "psci";

> >  			cpu-idle-states = <&CPU_SLEEP_0>;

> >  			capacity-dmips-mhz = <1024>;

> > +			clocks = <&kryocc 0>;

> > +			operating-points-v2 = <&cluster0_opp>;

> > +			#cooling-cells = <2>;

> >  			next-level-cache = <&L2_0>;

> >  			L2_0: l2-cache {

> >  			      compatible = "cache";

> > @@ -58,6 +62,9 @@ CPU1: cpu@1 {

> >  			enable-method = "psci";

> >  			cpu-idle-states = <&CPU_SLEEP_0>;

> >  			capacity-dmips-mhz = <1024>;

> > +			clocks = <&kryocc 0>;

> > +			operating-points-v2 = <&cluster0_opp>;

> > +			#cooling-cells = <2>;

> >  			next-level-cache = <&L2_0>;

> >  		};

> >  

> > @@ -68,6 +75,9 @@ CPU2: cpu@100 {

> >  			enable-method = "psci";

> >  			cpu-idle-states = <&CPU_SLEEP_0>;

> >  			capacity-dmips-mhz = <1024>;

> > +			clocks = <&kryocc 1>;

> > +			operating-points-v2 = <&cluster1_opp>;

> > +			#cooling-cells = <2>;

> >  			next-level-cache = <&L2_1>;

> >  			L2_1: l2-cache {

> >  			      compatible = "cache";

> > @@ -82,6 +92,9 @@ CPU3: cpu@101 {

> >  			enable-method = "psci";

> >  			cpu-idle-states = <&CPU_SLEEP_0>;

> >  			capacity-dmips-mhz = <1024>;

> > +			clocks = <&kryocc 1>;

> > +			operating-points-v2 = <&cluster1_opp>;

> > +			#cooling-cells = <2>;

> >  			next-level-cache = <&L2_1>;

> >  		};

> >  

> > @@ -121,6 +134,227 @@ CPU_SLEEP_0: cpu-sleep-0 {

> >  		};

> >  	};

> >  

> > +	cluster0_opp: opp_table0 {

> > +		compatible = "operating-points-v2-kryo-cpu";

> > +		nvmem-cells = <&speedbin_efuse>;

> > +		opp-shared;

> > +

> > +		/* Nominal fmax for now */

> > +		opp-307200000 {

> > +			opp-hz = /bits/ 64 <307200000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-422400000 {

> > +			opp-hz = /bits/ 64 <422400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-480000000 {

> > +			opp-hz = /bits/ 64 <480000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-556800000 {

> > +			opp-hz = /bits/ 64 <556800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-652800000 {

> > +			opp-hz = /bits/ 64 <652800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-729600000 {

> > +			opp-hz = /bits/ 64 <729600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-844800000 {

> > +			opp-hz = /bits/ 64 <844800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-960000000 {

> > +			opp-hz = /bits/ 64 <960000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1036800000 {

> > +			opp-hz = /bits/ 64 <1036800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1113600000 {

> > +			opp-hz = /bits/ 64 <1113600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1190400000 {

> > +			opp-hz = /bits/ 64 <1190400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1228800000 {

> > +			opp-hz = /bits/ 64 <1228800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1324800000 {

> > +			opp-hz = /bits/ 64 <1324800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1401600000 {

> > +			opp-hz = /bits/ 64 <1401600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1478400000 {

> > +			opp-hz = /bits/ 64 <1478400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1593600000 {

> > +			opp-hz = /bits/ 64 <1593600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +	};

> > +

> > +	cluster1_opp: opp_table1 {

> > +		compatible = "operating-points-v2-kryo-cpu";

> > +		nvmem-cells = <&speedbin_efuse>;

> > +		opp-shared;

> > +

> > +		/* Nominal fmax for now */

> > +		opp-307200000 {

> > +			opp-hz = /bits/ 64 <307200000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-403200000 {

> > +			opp-hz = /bits/ 64 <403200000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-480000000 {

> > +			opp-hz = /bits/ 64 <480000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-556800000 {

> > +			opp-hz = /bits/ 64 <556800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-652800000 {

> > +			opp-hz = /bits/ 64 <652800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-729600000 {

> > +			opp-hz = /bits/ 64 <729600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-806400000 {

> > +			opp-hz = /bits/ 64 <806400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-883200000 {

> > +			opp-hz = /bits/ 64 <883200000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-940800000 {

> > +			opp-hz = /bits/ 64 <940800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1036800000 {

> > +			opp-hz = /bits/ 64 <1036800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1113600000 {

> > +			opp-hz = /bits/ 64 <1113600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1190400000 {

> > +			opp-hz = /bits/ 64 <1190400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1248000000 {

> > +			opp-hz = /bits/ 64 <1248000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1324800000 {

> > +			opp-hz = /bits/ 64 <1324800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1401600000 {

> > +			opp-hz = /bits/ 64 <1401600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1478400000 {

> > +			opp-hz = /bits/ 64 <1478400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1555200000 {

> > +			opp-hz = /bits/ 64 <1555200000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1632000000 {

> > +			opp-hz = /bits/ 64 <1632000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1708800000 {

> > +			opp-hz = /bits/ 64 <1708800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1785600000 {

> > +			opp-hz = /bits/ 64 <1785600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1824000000 {

> > +			opp-hz = /bits/ 64 <1824000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1920000000 {

> > +			opp-hz = /bits/ 64 <1920000000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-1996800000 {

> > +			opp-hz = /bits/ 64 <1996800000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-2073600000 {

> > +			opp-hz = /bits/ 64 <2073600000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +		opp-2150400000 {

> > +			opp-hz = /bits/ 64 <2150400000>;

> > +			opp-supported-hw = <0x77>;

> > +			clock-latency-ns = <200000>;

> > +		};

> > +	};

> > +

> >  	firmware {

> >  		scm {

> >  			compatible = "qcom,scm-msm8996";

> > -- 

> > 2.31.1

> >
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 509d5bfec8ad..10e6fecc9e13 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -8,6 +8,7 @@ 
 #include <dt-bindings/clock/qcom,rpmcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,apr.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	interrupt-parent = <&intc>;
@@ -44,6 +45,9 @@  CPU0: cpu@0 {
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
+			clocks = <&kryocc 0>;
+			operating-points-v2 = <&cluster0_opp>;
+			#cooling-cells = <2>;
 			next-level-cache = <&L2_0>;
 			L2_0: l2-cache {
 			      compatible = "cache";
@@ -58,6 +62,9 @@  CPU1: cpu@1 {
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
+			clocks = <&kryocc 0>;
+			operating-points-v2 = <&cluster0_opp>;
+			#cooling-cells = <2>;
 			next-level-cache = <&L2_0>;
 		};
 
@@ -68,6 +75,9 @@  CPU2: cpu@100 {
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
+			clocks = <&kryocc 1>;
+			operating-points-v2 = <&cluster1_opp>;
+			#cooling-cells = <2>;
 			next-level-cache = <&L2_1>;
 			L2_1: l2-cache {
 			      compatible = "cache";
@@ -82,6 +92,9 @@  CPU3: cpu@101 {
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
 			capacity-dmips-mhz = <1024>;
+			clocks = <&kryocc 1>;
+			operating-points-v2 = <&cluster1_opp>;
+			#cooling-cells = <2>;
 			next-level-cache = <&L2_1>;
 		};
 
@@ -121,6 +134,227 @@  CPU_SLEEP_0: cpu-sleep-0 {
 		};
 	};
 
+	cluster0_opp: opp_table0 {
+		compatible = "operating-points-v2-kryo-cpu";
+		nvmem-cells = <&speedbin_efuse>;
+		opp-shared;
+
+		/* Nominal fmax for now */
+		opp-307200000 {
+			opp-hz = /bits/ 64 <307200000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-422400000 {
+			opp-hz = /bits/ 64 <422400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-480000000 {
+			opp-hz = /bits/ 64 <480000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-556800000 {
+			opp-hz = /bits/ 64 <556800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-652800000 {
+			opp-hz = /bits/ 64 <652800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-729600000 {
+			opp-hz = /bits/ 64 <729600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-844800000 {
+			opp-hz = /bits/ 64 <844800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-960000000 {
+			opp-hz = /bits/ 64 <960000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1036800000 {
+			opp-hz = /bits/ 64 <1036800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1113600000 {
+			opp-hz = /bits/ 64 <1113600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1190400000 {
+			opp-hz = /bits/ 64 <1190400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1228800000 {
+			opp-hz = /bits/ 64 <1228800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1324800000 {
+			opp-hz = /bits/ 64 <1324800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1401600000 {
+			opp-hz = /bits/ 64 <1401600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1478400000 {
+			opp-hz = /bits/ 64 <1478400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1593600000 {
+			opp-hz = /bits/ 64 <1593600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+	};
+
+	cluster1_opp: opp_table1 {
+		compatible = "operating-points-v2-kryo-cpu";
+		nvmem-cells = <&speedbin_efuse>;
+		opp-shared;
+
+		/* Nominal fmax for now */
+		opp-307200000 {
+			opp-hz = /bits/ 64 <307200000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-403200000 {
+			opp-hz = /bits/ 64 <403200000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-480000000 {
+			opp-hz = /bits/ 64 <480000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-556800000 {
+			opp-hz = /bits/ 64 <556800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-652800000 {
+			opp-hz = /bits/ 64 <652800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-729600000 {
+			opp-hz = /bits/ 64 <729600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-806400000 {
+			opp-hz = /bits/ 64 <806400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-883200000 {
+			opp-hz = /bits/ 64 <883200000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-940800000 {
+			opp-hz = /bits/ 64 <940800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1036800000 {
+			opp-hz = /bits/ 64 <1036800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1113600000 {
+			opp-hz = /bits/ 64 <1113600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1190400000 {
+			opp-hz = /bits/ 64 <1190400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1248000000 {
+			opp-hz = /bits/ 64 <1248000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1324800000 {
+			opp-hz = /bits/ 64 <1324800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1401600000 {
+			opp-hz = /bits/ 64 <1401600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1478400000 {
+			opp-hz = /bits/ 64 <1478400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1555200000 {
+			opp-hz = /bits/ 64 <1555200000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1632000000 {
+			opp-hz = /bits/ 64 <1632000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1708800000 {
+			opp-hz = /bits/ 64 <1708800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1785600000 {
+			opp-hz = /bits/ 64 <1785600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1824000000 {
+			opp-hz = /bits/ 64 <1824000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1920000000 {
+			opp-hz = /bits/ 64 <1920000000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-1996800000 {
+			opp-hz = /bits/ 64 <1996800000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-2073600000 {
+			opp-hz = /bits/ 64 <2073600000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+		opp-2150400000 {
+			opp-hz = /bits/ 64 <2150400000>;
+			opp-supported-hw = <0x77>;
+			clock-latency-ns = <200000>;
+		};
+	};
+
 	firmware {
 		scm {
 			compatible = "qcom,scm-msm8996";