[1/3] ARM: Samsung: Move timer irq numbers to end of linux irq space

Message ID 1318234289-22041-2-git-send-email-thomas.abraham@linaro.org
State New
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Commit Message

thomas.abraham@linaro.org Oct. 10, 2011, 8:11 a.m.
All of Samsung's s5p platforms have timer irqs statically mapped from linux
irq numbers 11 to 15. These timer irqs are moved to end of the statically
mapped linux irq space and the hardware irqs, which were statically mapped
starting from 32 is moved to start from 0. The NR_IRQS macro is consolidated
for all the s5p platforms in this process.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
 arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
 arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
 arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
 arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
 arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
 6 files changed, 9 insertions(+), 12 deletions(-)

Comments

rob.herring@linaro.org Oct. 12, 2011, 4:10 p.m. | #1
On 10/10/2011 03:11 AM, Thomas Abraham wrote:
> All of Samsung's s5p platforms have timer irqs statically mapped from linux
> irq numbers 11 to 15. These timer irqs are moved to end of the statically
> mapped linux irq space and the hardware irqs, which were statically mapped
> starting from 32 is moved to start from 0. The NR_IRQS macro is consolidated
> for all the s5p platforms in this process.
> 
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> ---
>  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
>  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
>  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
>  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
>  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
>  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
>  6 files changed, 9 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> index 4c9adbd..5c4fbcc 100644
> --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
> +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> @@ -72,7 +72,6 @@
>  		cmpcc	\irqnr, \irqnr
>  		cmpne	\irqnr, \tmp
>  		cmpcs	\irqnr, \irqnr
> -		addne	\irqnr, \irqnr, #32


With this change, can't you now use the common entry-macro-gic.S?


>  		.endm
>  
> diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
> index dfd4b7e..43087c3 100644
> --- a/arch/arm/mach-exynos4/include/mach/irqs.h
> +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
> @@ -163,7 +163,6 @@
>  #define IRQ_GPIO2_NR_GROUPS	9
>  #define IRQ_GPIO_END		(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
>  
> -/* Set the default NR_IRQS */
> -#define NR_IRQS			(IRQ_GPIO_END + 64)
> +#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
>  
>  #endif /* __ASM_ARCH_IRQS_H */
> diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> index 53982db..bea73cc 100644
> --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
> +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> @@ -141,8 +141,6 @@
>  
>  #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
>  
> -/* Set the default NR_IRQS */
> -
> -#define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
> +#define IRQ_TIMER_BASE		(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
>  
>  #endif /* __ASM_ARCH_IRQS_H */
> diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
> index d2eb475..3a9d300 100644
> --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
> +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
> @@ -104,8 +104,7 @@
>  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
>  #define S5P_GPIOINT_GROUP_MAXNR	21
>  
> -/* Set the default NR_IRQS */
> -#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> +#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>  
>  /* Compatibility */
>  #define IRQ_LCD_FIFO		IRQ_LCD0
> diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
> index 5e0de3a..df3173a 100644
> --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
> +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
> @@ -125,8 +125,7 @@
>  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
>  #define S5P_GPIOINT_GROUP_MAXNR	22
>  
> -/* Set the default NR_IRQS */
> -#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> +#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>  
>  /* Compatibility */
>  #define IRQ_LCD_FIFO		IRQ_LCD0
> diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
> index 08d1a7e..b8918b3 100644
> --- a/arch/arm/plat-samsung/include/plat/irqs.h
> +++ b/arch/arm/plat-samsung/include/plat/irqs.h
> @@ -22,7 +22,7 @@
>   * mulitple of 32 to allow the common code to work
>   */
>  
> -#define S5P_IRQ_OFFSET		(32)
> +#define S5P_IRQ_OFFSET		(0)

Just remove this.

>  
>  #define S5P_IRQ(x)		((x) + S5P_IRQ_OFFSET)
>  
> @@ -44,13 +44,14 @@
>  #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
>  #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
>  
> -#define S5P_TIMER_IRQ(x)	(11 + (x))
> +#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
>  
>  #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
>  #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
>  #define IRQ_TIMER2		S5P_TIMER_IRQ(2)
>  #define IRQ_TIMER3		S5P_TIMER_IRQ(3)
>  #define IRQ_TIMER4		S5P_TIMER_IRQ(4)
> +#define IRQ_TIMER_COUNT		(5)
>  
>  #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
>  					: ((x) - 16 + S5P_EINT_BASE2))
> @@ -77,4 +78,6 @@
>  #define S5P_IRQ_TYPE_EDGE_RISING	(0x03)
>  #define S5P_IRQ_TYPE_EDGE_BOTH		(0x04)
>  
> +#define NR_IRQS			(IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
> +
>  #endif /* __PLAT_SAMSUNG_IRQS_H */

Really these timer irqs should be converted to irq domains and be
dynamically allocated in the linux irq space, but this is at least a
step in the right direction.

Rob
thomas.abraham@linaro.org Oct. 12, 2011, 4:29 p.m. | #2
On 12 October 2011 21:40, Rob Herring <robherring2@gmail.com> wrote:
> On 10/10/2011 03:11 AM, Thomas Abraham wrote:
>> All of Samsung's s5p platforms have timer irqs statically mapped from linux
>> irq numbers 11 to 15. These timer irqs are moved to end of the statically
>> mapped linux irq space and the hardware irqs, which were statically mapped
>> starting from 32 is moved to start from 0. The NR_IRQS macro is consolidated
>> for all the s5p platforms in this process.
>>
>> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
>> ---
>>  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
>>  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
>>  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
>>  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
>>  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
>>  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
>>  6 files changed, 9 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
>> index 4c9adbd..5c4fbcc 100644
>> --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
>> +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
>> @@ -72,7 +72,6 @@
>>               cmpcc   \irqnr, \irqnr
>>               cmpne   \irqnr, \tmp
>>               cmpcs   \irqnr, \irqnr
>> -             addne   \irqnr, \irqnr, #32
>
>
> With this change, can't you now use the common entry-macro-gic.S?


The get_irqnr_preamble macro is quite different from that in
entry-macro-gic.S file. Maybe it is possible to use the common
entry-macro-gic.S file with some rework of exynos machine code.


>
>
>>               .endm
>>
>> diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
>> index dfd4b7e..43087c3 100644
>> --- a/arch/arm/mach-exynos4/include/mach/irqs.h
>> +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
>> @@ -163,7 +163,6 @@
>>  #define IRQ_GPIO2_NR_GROUPS  9
>>  #define IRQ_GPIO_END         (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
>>
>> -/* Set the default NR_IRQS */
>> -#define NR_IRQS                      (IRQ_GPIO_END + 64)
>> +#define IRQ_TIMER_BASE               (IRQ_GPIO_END + 64)
>>
>>  #endif /* __ASM_ARCH_IRQS_H */
>> diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
>> index 53982db..bea73cc 100644
>> --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
>> +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
>> @@ -141,8 +141,6 @@
>>
>>  #define IRQ_EINT_GROUP(grp, x)       (IRQ_EINT_GROUP##grp##_BASE + (x))
>>
>> -/* Set the default NR_IRQS */
>> -
>> -#define NR_IRQS                      (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
>> +#define IRQ_TIMER_BASE               (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
>>
>>  #endif /* __ASM_ARCH_IRQS_H */
>> diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
>> index d2eb475..3a9d300 100644
>> --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
>> +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
>> @@ -104,8 +104,7 @@
>>  #define S5P_GPIOINT_BASE     (IRQ_EINT(31) + 1)
>>  #define S5P_GPIOINT_GROUP_MAXNR      21
>>
>> -/* Set the default NR_IRQS */
>> -#define NR_IRQS                      (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>> +#define IRQ_TIMER_BASE               (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>>
>>  /* Compatibility */
>>  #define IRQ_LCD_FIFO         IRQ_LCD0
>> diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
>> index 5e0de3a..df3173a 100644
>> --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
>> +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
>> @@ -125,8 +125,7 @@
>>  #define S5P_GPIOINT_BASE     (IRQ_EINT(31) + 1)
>>  #define S5P_GPIOINT_GROUP_MAXNR      22
>>
>> -/* Set the default NR_IRQS */
>> -#define NR_IRQS                      (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>> +#define IRQ_TIMER_BASE               (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>>
>>  /* Compatibility */
>>  #define IRQ_LCD_FIFO         IRQ_LCD0
>> diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
>> index 08d1a7e..b8918b3 100644
>> --- a/arch/arm/plat-samsung/include/plat/irqs.h
>> +++ b/arch/arm/plat-samsung/include/plat/irqs.h
>> @@ -22,7 +22,7 @@
>>   * mulitple of 32 to allow the common code to work
>>   */
>>
>> -#define S5P_IRQ_OFFSET               (32)
>> +#define S5P_IRQ_OFFSET               (0)
>
> Just remove this.

Ok.

>
>>
>>  #define S5P_IRQ(x)           ((x) + S5P_IRQ_OFFSET)
>>
>> @@ -44,13 +44,14 @@
>>  #define S5P_IRQ_VIC2(x)              (S5P_VIC2_BASE + (x))
>>  #define S5P_IRQ_VIC3(x)              (S5P_VIC3_BASE + (x))
>>
>> -#define S5P_TIMER_IRQ(x)     (11 + (x))
>> +#define S5P_TIMER_IRQ(x)     (IRQ_TIMER_BASE + (x))
>>
>>  #define IRQ_TIMER0           S5P_TIMER_IRQ(0)
>>  #define IRQ_TIMER1           S5P_TIMER_IRQ(1)
>>  #define IRQ_TIMER2           S5P_TIMER_IRQ(2)
>>  #define IRQ_TIMER3           S5P_TIMER_IRQ(3)
>>  #define IRQ_TIMER4           S5P_TIMER_IRQ(4)
>> +#define IRQ_TIMER_COUNT              (5)
>>
>>  #define IRQ_EINT(x)          ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
>>                                       : ((x) - 16 + S5P_EINT_BASE2))
>> @@ -77,4 +78,6 @@
>>  #define S5P_IRQ_TYPE_EDGE_RISING     (0x03)
>>  #define S5P_IRQ_TYPE_EDGE_BOTH               (0x04)
>>
>> +#define NR_IRQS                      (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
>> +
>>  #endif /* __PLAT_SAMSUNG_IRQS_H */
>
> Really these timer irqs should be converted to irq domains and be
> dynamically allocated in the linux irq space, but this is at least a
> step in the right direction.

Ok.

Thanks for your comments.

Regards,
Thomas.

>
> Rob
>
Grant Likely Oct. 13, 2011, 12:41 a.m. | #3
On Wed, Oct 12, 2011 at 11:10:41AM -0500, Rob Herring wrote:
> On 10/10/2011 03:11 AM, Thomas Abraham wrote:
> > All of Samsung's s5p platforms have timer irqs statically mapped from linux
> > irq numbers 11 to 15. These timer irqs are moved to end of the statically
> > mapped linux irq space and the hardware irqs, which were statically mapped
> > starting from 32 is moved to start from 0. The NR_IRQS macro is consolidated
> > for all the s5p platforms in this process.
> > 
> > Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> > ---
> >  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
> >  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
> >  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
> >  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
> >  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
> >  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
> >  6 files changed, 9 insertions(+), 12 deletions(-)
> > 
> > diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > index 4c9adbd..5c4fbcc 100644
> > --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > @@ -72,7 +72,6 @@
> >  		cmpcc	\irqnr, \irqnr
> >  		cmpne	\irqnr, \tmp
> >  		cmpcs	\irqnr, \irqnr
> > -		addne	\irqnr, \irqnr, #32
> 
> 
> With this change, can't you now use the common entry-macro-gic.S?
> 
> 
> >  		.endm
> >  
> > diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
> > index dfd4b7e..43087c3 100644
> > --- a/arch/arm/mach-exynos4/include/mach/irqs.h
> > +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
> > @@ -163,7 +163,6 @@
> >  #define IRQ_GPIO2_NR_GROUPS	9
> >  #define IRQ_GPIO_END		(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
> >  
> > -/* Set the default NR_IRQS */
> > -#define NR_IRQS			(IRQ_GPIO_END + 64)
> > +#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
> >  
> >  #endif /* __ASM_ARCH_IRQS_H */
> > diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > index 53982db..bea73cc 100644
> > --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > @@ -141,8 +141,6 @@
> >  
> >  #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
> >  
> > -/* Set the default NR_IRQS */
> > -
> > -#define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
> > +#define IRQ_TIMER_BASE		(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
> >  
> >  #endif /* __ASM_ARCH_IRQS_H */
> > diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
> > index d2eb475..3a9d300 100644
> > --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
> > +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
> > @@ -104,8 +104,7 @@
> >  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
> >  #define S5P_GPIOINT_GROUP_MAXNR	21
> >  
> > -/* Set the default NR_IRQS */
> > -#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> > +#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> >  
> >  /* Compatibility */
> >  #define IRQ_LCD_FIFO		IRQ_LCD0
> > diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
> > index 5e0de3a..df3173a 100644
> > --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
> > +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
> > @@ -125,8 +125,7 @@
> >  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
> >  #define S5P_GPIOINT_GROUP_MAXNR	22
> >  
> > -/* Set the default NR_IRQS */
> > -#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> > +#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> >  
> >  /* Compatibility */
> >  #define IRQ_LCD_FIFO		IRQ_LCD0
> > diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
> > index 08d1a7e..b8918b3 100644
> > --- a/arch/arm/plat-samsung/include/plat/irqs.h
> > +++ b/arch/arm/plat-samsung/include/plat/irqs.h
> > @@ -22,7 +22,7 @@
> >   * mulitple of 32 to allow the common code to work
> >   */
> >  
> > -#define S5P_IRQ_OFFSET		(32)
> > +#define S5P_IRQ_OFFSET		(0)
> 
> Just remove this.

One comment on this; Make sure irqs mapping does *not* start at 0. 0 is not supposed to be used.

g.
Changhwan Youn Oct. 18, 2011, 8:10 a.m. | #4
Hi Thomas,

All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically
mapped to linux irq numbers 16 to 31. These interrupts also need proper handling.

Best regards,
Changhwan Youn

On 10/10/2011 03:11 AM, Thomas Abraham wrote:
> All of Samsung's s5p platforms have timer irqs statically mapped from linux
> irq numbers 11 to 15. These timer irqs are moved to end of the statically
> mapped linux irq space and the hardware irqs, which were statically mapped
> starting from 32 is moved to start from 0. The NR_IRQS macro is consolidated
> for all the s5p platforms in this process.
> 
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> ---
>  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
>  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
>  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
>  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
>  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
>  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
>  6 files changed, 9 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-
> exynos4/include/mach/entry-macro.S
> index 4c9adbd..5c4fbcc 100644
> --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
> +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> @@ -72,7 +72,6 @@
>  		cmpcc	\irqnr, \irqnr
>  		cmpne	\irqnr, \tmp
>  		cmpcs	\irqnr, \irqnr
> -		addne	\irqnr, \irqnr, #32
> 
>  		.endm
> 
> diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
> index dfd4b7e..43087c3 100644
> --- a/arch/arm/mach-exynos4/include/mach/irqs.h
> +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
> @@ -163,7 +163,6 @@
>  #define IRQ_GPIO2_NR_GROUPS	9
>  #define IRQ_GPIO_END		(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
> 
> -/* Set the default NR_IRQS */
> -#define NR_IRQS			(IRQ_GPIO_END + 64)
> +#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
> 
>  #endif /* __ASM_ARCH_IRQS_H */
> diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> index 53982db..bea73cc 100644
> --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
> +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> @@ -141,8 +141,6 @@
> 
>  #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
> 
> -/* Set the default NR_IRQS */
> -
> -#define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
> +#define IRQ_TIMER_BASE		(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
> 
>  #endif /* __ASM_ARCH_IRQS_H */
> diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
> index d2eb475..3a9d300 100644
> --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
> +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
> @@ -104,8 +104,7 @@
>  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
>  #define S5P_GPIOINT_GROUP_MAXNR	21
> 
> -/* Set the default NR_IRQS */
> -#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> +#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> 
>  /* Compatibility */
>  #define IRQ_LCD_FIFO		IRQ_LCD0
> diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
> index 5e0de3a..df3173a 100644
> --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
> +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
> @@ -125,8 +125,7 @@
>  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
>  #define S5P_GPIOINT_GROUP_MAXNR	22
> 
> -/* Set the default NR_IRQS */
> -#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> +#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
> 
>  /* Compatibility */
>  #define IRQ_LCD_FIFO		IRQ_LCD0
> diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
> index 08d1a7e..b8918b3 100644
> --- a/arch/arm/plat-samsung/include/plat/irqs.h
> +++ b/arch/arm/plat-samsung/include/plat/irqs.h
> @@ -22,7 +22,7 @@
>   * mulitple of 32 to allow the common code to work
>   */
> 
> -#define S5P_IRQ_OFFSET		(32)
> +#define S5P_IRQ_OFFSET		(0)
> 
>  #define S5P_IRQ(x)		((x) + S5P_IRQ_OFFSET)
> 
> @@ -44,13 +44,14 @@
>  #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
>  #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
> 
> -#define S5P_TIMER_IRQ(x)	(11 + (x))
> +#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
> 
>  #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
>  #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
>  #define IRQ_TIMER2		S5P_TIMER_IRQ(2)
>  #define IRQ_TIMER3		S5P_TIMER_IRQ(3)
>  #define IRQ_TIMER4		S5P_TIMER_IRQ(4)
> +#define IRQ_TIMER_COUNT		(5)
> 
>  #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
>  					: ((x) - 16 + S5P_EINT_BASE2))
> @@ -77,4 +78,6 @@
>  #define S5P_IRQ_TYPE_EDGE_RISING	(0x03)
>  #define S5P_IRQ_TYPE_EDGE_BOTH		(0x04)
> 
> +#define NR_IRQS			(IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
> +
>  #endif /* __PLAT_SAMSUNG_IRQS_H */
> --
> 1.6.6.rc2
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Kukjin Kim Oct. 21, 2011, 9:56 a.m. | #5
Changhwan Youn wrote:
> 
> Hi Thomas,
> 
> All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically
> mapped to linux irq numbers 16 to 31. These interrupts also need proper
handling.
> 
> Best regards,
> Changhwan Youn
> 

Hi all,

Hmm, I'd like to apply Thomas' device tree series for EXYNOS4 and Samsung
stuff for upcoming merge window but there are still some comments on some
stuff and that should be fixed before applying. In addition I need to keep
the ordering to apply them to avoid conflicts. But as you know, v3.1 is now
close at hand and we don't have enough time for it now :(

I will leave tomorrow morning (KST) for KS. I will talk to Grant Likely
about this in Prague :)

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

> On 10/10/2011 03:11 AM, Thomas Abraham wrote:
> > All of Samsung's s5p platforms have timer irqs statically mapped from
linux
> > irq numbers 11 to 15. These timer irqs are moved to end of the
statically
> > mapped linux irq space and the hardware irqs, which were statically
mapped
> > starting from 32 is moved to start from 0. The NR_IRQS macro is
consolidated
> > for all the s5p platforms in this process.
> >
> > Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> > ---
> >  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
> >  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
> >  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
> >  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
> >  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
> >  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
> >  6 files changed, 9 insertions(+), 12 deletions(-)
> >
> > diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S
b/arch/arm/mach-
> > exynos4/include/mach/entry-macro.S
> > index 4c9adbd..5c4fbcc 100644
> > --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > @@ -72,7 +72,6 @@
> >  		cmpcc	\irqnr, \irqnr
> >  		cmpne	\irqnr, \tmp
> >  		cmpcs	\irqnr, \irqnr
> > -		addne	\irqnr, \irqnr, #32
> >
> >  		.endm
> >
> > diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-
> exynos4/include/mach/irqs.h
> > index dfd4b7e..43087c3 100644
> > --- a/arch/arm/mach-exynos4/include/mach/irqs.h
> > +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
> > @@ -163,7 +163,6 @@
> >  #define IRQ_GPIO2_NR_GROUPS	9
> >  #define IRQ_GPIO_END		(S5P_GPIOINT_BASE +
> S5P_GPIOINT_COUNT)
> >
> > -/* Set the default NR_IRQS */
> > -#define NR_IRQS			(IRQ_GPIO_END + 64)
> > +#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
> >
> >  #endif /* __ASM_ARCH_IRQS_H */
> > diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-
> s5p64x0/include/mach/irqs.h
> > index 53982db..bea73cc 100644
> > --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > @@ -141,8 +141,6 @@
> >
> >  #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE +
> (x))
> >
> > -/* Set the default NR_IRQS */
> > -
> > -#define NR_IRQS			(IRQ_EINT_GROUP8_BASE +
> IRQ_EINT_GROUP8_NR + 1)
> > +#define IRQ_TIMER_BASE		(IRQ_EINT_GROUP8_BASE +
> IRQ_EINT_GROUP8_NR + 1)
> >
> >  #endif /* __ASM_ARCH_IRQS_H */
> > diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-
> s5pc100/include/mach/irqs.h
> > index d2eb475..3a9d300 100644
> > --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
> > +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
> > @@ -104,8 +104,7 @@
> >  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
> >  #define S5P_GPIOINT_GROUP_MAXNR	21
> >
> > -/* Set the default NR_IRQS */
> > -#define NR_IRQS			(IRQ_EINT(31) +
> S5P_GPIOINT_COUNT + 1)
> > +#define IRQ_TIMER_BASE		(IRQ_EINT(31) +
> S5P_GPIOINT_COUNT + 1)
> >
> >  /* Compatibility */
> >  #define IRQ_LCD_FIFO		IRQ_LCD0
> > diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-
> s5pv210/include/mach/irqs.h
> > index 5e0de3a..df3173a 100644
> > --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
> > +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
> > @@ -125,8 +125,7 @@
> >  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
> >  #define S5P_GPIOINT_GROUP_MAXNR	22
> >
> > -/* Set the default NR_IRQS */
> > -#define NR_IRQS			(IRQ_EINT(31) +
> S5P_GPIOINT_COUNT + 1)
> > +#define IRQ_TIMER_BASE		(IRQ_EINT(31) +
> S5P_GPIOINT_COUNT + 1)
> >
> >  /* Compatibility */
> >  #define IRQ_LCD_FIFO		IRQ_LCD0
> > diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-
> samsung/include/plat/irqs.h
> > index 08d1a7e..b8918b3 100644
> > --- a/arch/arm/plat-samsung/include/plat/irqs.h
> > +++ b/arch/arm/plat-samsung/include/plat/irqs.h
> > @@ -22,7 +22,7 @@
> >   * mulitple of 32 to allow the common code to work
> >   */
> >
> > -#define S5P_IRQ_OFFSET		(32)
> > +#define S5P_IRQ_OFFSET		(0)
> >
> >  #define S5P_IRQ(x)		((x) + S5P_IRQ_OFFSET)
> >
> > @@ -44,13 +44,14 @@
> >  #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
> >  #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
> >
> > -#define S5P_TIMER_IRQ(x)	(11 + (x))
> > +#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
> >
> >  #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
> >  #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
> >  #define IRQ_TIMER2		S5P_TIMER_IRQ(2)
> >  #define IRQ_TIMER3		S5P_TIMER_IRQ(3)
> >  #define IRQ_TIMER4		S5P_TIMER_IRQ(4)
> > +#define IRQ_TIMER_COUNT		(5)
> >
> >  #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
> >  					: ((x) - 16 + S5P_EINT_BASE2))
> > @@ -77,4 +78,6 @@
> >  #define S5P_IRQ_TYPE_EDGE_RISING	(0x03)
> >  #define S5P_IRQ_TYPE_EDGE_BOTH		(0x04)
> >
> > +#define NR_IRQS			(IRQ_TIMER_BASE +
> IRQ_TIMER_COUNT)
> > +
> >  #endif /* __PLAT_SAMSUNG_IRQS_H */
> > --
> > 1.6.6.rc2
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
thomas.abraham@linaro.org Oct. 21, 2011, 4:54 p.m. | #6
Hi Changhwan,

On 18 October 2011 13:40, Changhwan Youn <chaos.youn@samsung.com> wrote:
> Hi Thomas,
>
> All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically
> mapped to linux irq numbers 16 to 31. These interrupts also need proper handling.

A patchset has been submitted to consolidate the uart interrupt
handling for Samsung platforms. The following is the link submitted
for this patch series.
http://www.mail-archive.com/linux-samsung-soc@vger.kernel.org/msg06035.html

With this patchset, the linux irq space of 16 to 31 is freed. This
patchset has been queued for merge for the 3.2 merge window.

Thanks,
Thomas.

>
> Best regards,
> Changhwan Youn
>
> On 10/10/2011 03:11 AM, Thomas Abraham wrote:
>> All of Samsung's s5p platforms have timer irqs statically mapped from linux
>> irq numbers 11 to 15. These timer irqs are moved to end of the statically
>> mapped linux irq space and the hardware irqs, which were statically mapped
>> starting from 32 is moved to start from 0. The NR_IRQS macro is consolidated
>> for all the s5p platforms in this process.
>>
>> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
>> ---
>>  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
>>  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
>>  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
>>  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
>>  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
>>  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
>>  6 files changed, 9 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-
>> exynos4/include/mach/entry-macro.S
>> index 4c9adbd..5c4fbcc 100644
>> --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
>> +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
>> @@ -72,7 +72,6 @@
>>               cmpcc   \irqnr, \irqnr
>>               cmpne   \irqnr, \tmp
>>               cmpcs   \irqnr, \irqnr
>> -             addne   \irqnr, \irqnr, #32
>>
>>               .endm
>>
>> diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
>> index dfd4b7e..43087c3 100644
>> --- a/arch/arm/mach-exynos4/include/mach/irqs.h
>> +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
>> @@ -163,7 +163,6 @@
>>  #define IRQ_GPIO2_NR_GROUPS  9
>>  #define IRQ_GPIO_END         (S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
>>
>> -/* Set the default NR_IRQS */
>> -#define NR_IRQS                      (IRQ_GPIO_END + 64)
>> +#define IRQ_TIMER_BASE               (IRQ_GPIO_END + 64)
>>
>>  #endif /* __ASM_ARCH_IRQS_H */
>> diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
>> index 53982db..bea73cc 100644
>> --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
>> +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
>> @@ -141,8 +141,6 @@
>>
>>  #define IRQ_EINT_GROUP(grp, x)       (IRQ_EINT_GROUP##grp##_BASE + (x))
>>
>> -/* Set the default NR_IRQS */
>> -
>> -#define NR_IRQS                      (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
>> +#define IRQ_TIMER_BASE               (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
>>
>>  #endif /* __ASM_ARCH_IRQS_H */
>> diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
>> index d2eb475..3a9d300 100644
>> --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
>> +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
>> @@ -104,8 +104,7 @@
>>  #define S5P_GPIOINT_BASE     (IRQ_EINT(31) + 1)
>>  #define S5P_GPIOINT_GROUP_MAXNR      21
>>
>> -/* Set the default NR_IRQS */
>> -#define NR_IRQS                      (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>> +#define IRQ_TIMER_BASE               (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>>
>>  /* Compatibility */
>>  #define IRQ_LCD_FIFO         IRQ_LCD0
>> diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
>> index 5e0de3a..df3173a 100644
>> --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
>> +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
>> @@ -125,8 +125,7 @@
>>  #define S5P_GPIOINT_BASE     (IRQ_EINT(31) + 1)
>>  #define S5P_GPIOINT_GROUP_MAXNR      22
>>
>> -/* Set the default NR_IRQS */
>> -#define NR_IRQS                      (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>> +#define IRQ_TIMER_BASE               (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
>>
>>  /* Compatibility */
>>  #define IRQ_LCD_FIFO         IRQ_LCD0
>> diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
>> index 08d1a7e..b8918b3 100644
>> --- a/arch/arm/plat-samsung/include/plat/irqs.h
>> +++ b/arch/arm/plat-samsung/include/plat/irqs.h
>> @@ -22,7 +22,7 @@
>>   * mulitple of 32 to allow the common code to work
>>   */
>>
>> -#define S5P_IRQ_OFFSET               (32)
>> +#define S5P_IRQ_OFFSET               (0)
>>
>>  #define S5P_IRQ(x)           ((x) + S5P_IRQ_OFFSET)
>>
>> @@ -44,13 +44,14 @@
>>  #define S5P_IRQ_VIC2(x)              (S5P_VIC2_BASE + (x))
>>  #define S5P_IRQ_VIC3(x)              (S5P_VIC3_BASE + (x))
>>
>> -#define S5P_TIMER_IRQ(x)     (11 + (x))
>> +#define S5P_TIMER_IRQ(x)     (IRQ_TIMER_BASE + (x))
>>
>>  #define IRQ_TIMER0           S5P_TIMER_IRQ(0)
>>  #define IRQ_TIMER1           S5P_TIMER_IRQ(1)
>>  #define IRQ_TIMER2           S5P_TIMER_IRQ(2)
>>  #define IRQ_TIMER3           S5P_TIMER_IRQ(3)
>>  #define IRQ_TIMER4           S5P_TIMER_IRQ(4)
>> +#define IRQ_TIMER_COUNT              (5)
>>
>>  #define IRQ_EINT(x)          ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
>>                                       : ((x) - 16 + S5P_EINT_BASE2))
>> @@ -77,4 +78,6 @@
>>  #define S5P_IRQ_TYPE_EDGE_RISING     (0x03)
>>  #define S5P_IRQ_TYPE_EDGE_BOTH               (0x04)
>>
>> +#define NR_IRQS                      (IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
>> +
>>  #endif /* __PLAT_SAMSUNG_IRQS_H */
>> --
>> 1.6.6.rc2
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
>
Grant Likely Oct. 21, 2011, 7:45 p.m. | #7
On Fri, Oct 21, 2011 at 06:56:52PM +0900, Kukjin Kim wrote:
> Changhwan Youn wrote:
> > 
> > Hi Thomas,
> > 
> > All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically
> > mapped to linux irq numbers 16 to 31. These interrupts also need proper
> handling.
> > 
> > Best regards,
> > Changhwan Youn
> > 
> 
> Hi all,
> 
> Hmm, I'd like to apply Thomas' device tree series for EXYNOS4 and Samsung
> stuff for upcoming merge window but there are still some comments on some
> stuff and that should be fixed before applying. In addition I need to keep
> the ordering to apply them to avoid conflicts. But as you know, v3.1 is now
> close at hand and we don't have enough time for it now :(
> 
> I will leave tomorrow morning (KST) for KS. I will talk to Grant Likely
> about this in Prague :)

One of the goals I have for the hacking summit is to get as much of
the outstanding DT patches queued up and into linux-next.

g.

> 
> Thanks.
> 
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
> 
> > On 10/10/2011 03:11 AM, Thomas Abraham wrote:
> > > All of Samsung's s5p platforms have timer irqs statically mapped from
> linux
> > > irq numbers 11 to 15. These timer irqs are moved to end of the
> statically
> > > mapped linux irq space and the hardware irqs, which were statically
> mapped
> > > starting from 32 is moved to start from 0. The NR_IRQS macro is
> consolidated
> > > for all the s5p platforms in this process.
> > >
> > > Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> > > ---
> > >  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
> > >  arch/arm/mach-exynos4/include/mach/irqs.h        |    3 +--
> > >  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    4 +---
> > >  arch/arm/mach-s5pc100/include/mach/irqs.h        |    3 +--
> > >  arch/arm/mach-s5pv210/include/mach/irqs.h        |    3 +--
> > >  arch/arm/plat-samsung/include/plat/irqs.h        |    7 +++++--
> > >  6 files changed, 9 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S
> b/arch/arm/mach-
> > > exynos4/include/mach/entry-macro.S
> > > index 4c9adbd..5c4fbcc 100644
> > > --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > > +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
> > > @@ -72,7 +72,6 @@
> > >  		cmpcc	\irqnr, \irqnr
> > >  		cmpne	\irqnr, \tmp
> > >  		cmpcs	\irqnr, \irqnr
> > > -		addne	\irqnr, \irqnr, #32
> > >
> > >  		.endm
> > >
> > > diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-
> > exynos4/include/mach/irqs.h
> > > index dfd4b7e..43087c3 100644
> > > --- a/arch/arm/mach-exynos4/include/mach/irqs.h
> > > +++ b/arch/arm/mach-exynos4/include/mach/irqs.h
> > > @@ -163,7 +163,6 @@
> > >  #define IRQ_GPIO2_NR_GROUPS	9
> > >  #define IRQ_GPIO_END		(S5P_GPIOINT_BASE +
> > S5P_GPIOINT_COUNT)
> > >
> > > -/* Set the default NR_IRQS */
> > > -#define NR_IRQS			(IRQ_GPIO_END + 64)
> > > +#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
> > >
> > >  #endif /* __ASM_ARCH_IRQS_H */
> > > diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-
> > s5p64x0/include/mach/irqs.h
> > > index 53982db..bea73cc 100644
> > > --- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > > +++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
> > > @@ -141,8 +141,6 @@
> > >
> > >  #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE +
> > (x))
> > >
> > > -/* Set the default NR_IRQS */
> > > -
> > > -#define NR_IRQS			(IRQ_EINT_GROUP8_BASE +
> > IRQ_EINT_GROUP8_NR + 1)
> > > +#define IRQ_TIMER_BASE		(IRQ_EINT_GROUP8_BASE +
> > IRQ_EINT_GROUP8_NR + 1)
> > >
> > >  #endif /* __ASM_ARCH_IRQS_H */
> > > diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-
> > s5pc100/include/mach/irqs.h
> > > index d2eb475..3a9d300 100644
> > > --- a/arch/arm/mach-s5pc100/include/mach/irqs.h
> > > +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
> > > @@ -104,8 +104,7 @@
> > >  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
> > >  #define S5P_GPIOINT_GROUP_MAXNR	21
> > >
> > > -/* Set the default NR_IRQS */
> > > -#define NR_IRQS			(IRQ_EINT(31) +
> > S5P_GPIOINT_COUNT + 1)
> > > +#define IRQ_TIMER_BASE		(IRQ_EINT(31) +
> > S5P_GPIOINT_COUNT + 1)
> > >
> > >  /* Compatibility */
> > >  #define IRQ_LCD_FIFO		IRQ_LCD0
> > > diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-
> > s5pv210/include/mach/irqs.h
> > > index 5e0de3a..df3173a 100644
> > > --- a/arch/arm/mach-s5pv210/include/mach/irqs.h
> > > +++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
> > > @@ -125,8 +125,7 @@
> > >  #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
> > >  #define S5P_GPIOINT_GROUP_MAXNR	22
> > >
> > > -/* Set the default NR_IRQS */
> > > -#define NR_IRQS			(IRQ_EINT(31) +
> > S5P_GPIOINT_COUNT + 1)
> > > +#define IRQ_TIMER_BASE		(IRQ_EINT(31) +
> > S5P_GPIOINT_COUNT + 1)
> > >
> > >  /* Compatibility */
> > >  #define IRQ_LCD_FIFO		IRQ_LCD0
> > > diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-
> > samsung/include/plat/irqs.h
> > > index 08d1a7e..b8918b3 100644
> > > --- a/arch/arm/plat-samsung/include/plat/irqs.h
> > > +++ b/arch/arm/plat-samsung/include/plat/irqs.h
> > > @@ -22,7 +22,7 @@
> > >   * mulitple of 32 to allow the common code to work
> > >   */
> > >
> > > -#define S5P_IRQ_OFFSET		(32)
> > > +#define S5P_IRQ_OFFSET		(0)
> > >
> > >  #define S5P_IRQ(x)		((x) + S5P_IRQ_OFFSET)
> > >
> > > @@ -44,13 +44,14 @@
> > >  #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
> > >  #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
> > >
> > > -#define S5P_TIMER_IRQ(x)	(11 + (x))
> > > +#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
> > >
> > >  #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
> > >  #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
> > >  #define IRQ_TIMER2		S5P_TIMER_IRQ(2)
> > >  #define IRQ_TIMER3		S5P_TIMER_IRQ(3)
> > >  #define IRQ_TIMER4		S5P_TIMER_IRQ(4)
> > > +#define IRQ_TIMER_COUNT		(5)
> > >
> > >  #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
> > >  					: ((x) - 16 + S5P_EINT_BASE2))
> > > @@ -77,4 +78,6 @@
> > >  #define S5P_IRQ_TYPE_EDGE_RISING	(0x03)
> > >  #define S5P_IRQ_TYPE_EDGE_BOTH		(0x04)
> > >
> > > +#define NR_IRQS			(IRQ_TIMER_BASE +
> > IRQ_TIMER_COUNT)
> > > +
> > >  #endif /* __PLAT_SAMSUNG_IRQS_H */
> > > --
> > > 1.6.6.rc2
> > >
> > >
> > > _______________________________________________
> > > linux-arm-kernel mailing list
> > > linux-arm-kernel@lists.infradead.org
> > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
Kukjin Kim Oct. 24, 2011, 8:09 a.m. | #8
On 10/21/11 21:45, Grant Likely wrote:
> On Fri, Oct 21, 2011 at 06:56:52PM +0900, Kukjin Kim wrote:
>> Changhwan Youn wrote:
>>>
>>> Hi Thomas,
>>>
>>> All UART_IRQ_RXD, TXD, ERR of Samsung's platforms are also statically
>>> mapped to linux irq numbers 16 to 31. These interrupts also need proper
>> handling.
>>>
>>> Best regards,
>>> Changhwan Youn
>>>
>>
>> Hi all,
>>
>> Hmm, I'd like to apply Thomas' device tree series for EXYNOS4 and Samsung
>> stuff for upcoming merge window but there are still some comments on some
>> stuff and that should be fixed before applying. In addition I need to keep
>> the ordering to apply them to avoid conflicts. But as you know, v3.1 is now
>> close at hand and we don't have enough time for it now :(
>>
>> I will leave tomorrow morning (KST) for KS. I will talk to Grant Likely
>> about this in Prague :)
>
> One of the goals I have for the hacking summit is to get as much of
> the outstanding DT patches queued up and into linux-next.
>
OK.

I talked to Grant at ARM Subarch Workshop.

I will apply Thomas' DT patches into Samsung tree and it will be sent to 
upstream via arm-soc for upcoming merge window v3.2 and if any fixing is 
required, we will do it during -rc.

Thomas, if any problems during apply, let you know.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Patch hide | download patch | download mbox

diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
index 4c9adbd..5c4fbcc 100644
--- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
@@ -72,7 +72,6 @@ 
 		cmpcc	\irqnr, \irqnr
 		cmpne	\irqnr, \tmp
 		cmpcs	\irqnr, \irqnr
-		addne	\irqnr, \irqnr, #32
 
 		.endm
 
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index dfd4b7e..43087c3 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -163,7 +163,6 @@ 
 #define IRQ_GPIO2_NR_GROUPS	9
 #define IRQ_GPIO_END		(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
 
-/* Set the default NR_IRQS */
-#define NR_IRQS			(IRQ_GPIO_END + 64)
+#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
 
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 53982db..bea73cc 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,8 +141,6 @@ 
 
 #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
 
-/* Set the default NR_IRQS */
-
-#define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
+#define IRQ_TIMER_BASE		(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
 
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index d2eb475..3a9d300 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -104,8 +104,7 @@ 
 #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
 #define S5P_GPIOINT_GROUP_MAXNR	21
 
-/* Set the default NR_IRQS */
-#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
+#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
 
 /* Compatibility */
 #define IRQ_LCD_FIFO		IRQ_LCD0
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 5e0de3a..df3173a 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -125,8 +125,7 @@ 
 #define S5P_GPIOINT_BASE	(IRQ_EINT(31) + 1)
 #define S5P_GPIOINT_GROUP_MAXNR	22
 
-/* Set the default NR_IRQS */
-#define NR_IRQS			(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
+#define IRQ_TIMER_BASE		(IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1)
 
 /* Compatibility */
 #define IRQ_LCD_FIFO		IRQ_LCD0
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index 08d1a7e..b8918b3 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -22,7 +22,7 @@ 
  * mulitple of 32 to allow the common code to work
  */
 
-#define S5P_IRQ_OFFSET		(32)
+#define S5P_IRQ_OFFSET		(0)
 
 #define S5P_IRQ(x)		((x) + S5P_IRQ_OFFSET)
 
@@ -44,13 +44,14 @@ 
 #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
 #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
 
-#define S5P_TIMER_IRQ(x)	(11 + (x))
+#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
 
 #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
 #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
 #define IRQ_TIMER2		S5P_TIMER_IRQ(2)
 #define IRQ_TIMER3		S5P_TIMER_IRQ(3)
 #define IRQ_TIMER4		S5P_TIMER_IRQ(4)
+#define IRQ_TIMER_COUNT		(5)
 
 #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
 					: ((x) - 16 + S5P_EINT_BASE2))
@@ -77,4 +78,6 @@ 
 #define S5P_IRQ_TYPE_EDGE_RISING	(0x03)
 #define S5P_IRQ_TYPE_EDGE_BOTH		(0x04)
 
+#define NR_IRQS			(IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
+
 #endif /* __PLAT_SAMSUNG_IRQS_H */