diff mbox series

[RESEND,v2,2/2] cpuidle: qcom: Add SPM register data for MSM8226

Message ID 20210612205335.9730-3-bartosz.dudziak@snejp.pl
State Accepted
Commit 0f0ac1e4eef2753d4f9cd0117019da9501921fef
Headers show
Series [RESEND,v2,1/2] dt-bindings: arm: msm: Add SAW2 for MSM8226 | expand

Commit Message

Bartosz Dudziak June 12, 2021, 8:53 p.m. UTC
Add MSM8226 register data to SPM AVS Wrapper 2 (SAW2) power controller
driver.

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
---
 drivers/cpuidle/cpuidle-qcom-spm.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Daniel Lezcano June 21, 2021, 11:17 a.m. UTC | #1
On 12/06/2021 22:53, Bartosz Dudziak wrote:
> Add MSM8226 register data to SPM AVS Wrapper 2 (SAW2) power controller

> driver.

> 

> Reviewed-by: Stephan Gerhold <stephan@gerhold.net>

> Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>


Bjorn ? Andy ?

> ---

>  drivers/cpuidle/cpuidle-qcom-spm.c | 14 ++++++++++++++

>  1 file changed, 14 insertions(+)

> 

> diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c

> index adf91a6e4d..c0e7971da2 100644

> --- a/drivers/cpuidle/cpuidle-qcom-spm.c

> +++ b/drivers/cpuidle/cpuidle-qcom-spm.c

> @@ -87,6 +87,18 @@ static const struct spm_reg_data spm_reg_8974_8084_cpu  = {

>  	.start_index[PM_SLEEP_MODE_SPC] = 3,

>  };

>  

> +/* SPM register data for 8226 */

> +static const struct spm_reg_data spm_reg_8226_cpu  = {

> +	.reg_offset = spm_reg_offset_v2_1,

> +	.spm_cfg = 0x0,

> +	.spm_dly = 0x3C102800,

> +	.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,

> +		0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,

> +		0x80, 0x10, 0x26, 0x30, 0x0F },

> +	.start_index[PM_SLEEP_MODE_STBY] = 0,

> +	.start_index[PM_SLEEP_MODE_SPC] = 5,

> +};

> +

>  static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = {

>  	[SPM_REG_CFG]		= 0x08,

>  	[SPM_REG_SPM_CTL]	= 0x20,

> @@ -259,6 +271,8 @@ static struct spm_driver_data *spm_get_drv(struct platform_device *pdev,

>  }

>  

>  static const struct of_device_id spm_match_table[] = {

> +	{ .compatible = "qcom,msm8226-saw2-v2.1-cpu",

> +	  .data = &spm_reg_8226_cpu },

>  	{ .compatible = "qcom,msm8974-saw2-v2.1-cpu",

>  	  .data = &spm_reg_8974_8084_cpu },

>  	{ .compatible = "qcom,apq8084-saw2-v2.1-cpu",

> 



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diff mbox series

Patch

diff --git a/drivers/cpuidle/cpuidle-qcom-spm.c b/drivers/cpuidle/cpuidle-qcom-spm.c
index adf91a6e4d..c0e7971da2 100644
--- a/drivers/cpuidle/cpuidle-qcom-spm.c
+++ b/drivers/cpuidle/cpuidle-qcom-spm.c
@@ -87,6 +87,18 @@  static const struct spm_reg_data spm_reg_8974_8084_cpu  = {
 	.start_index[PM_SLEEP_MODE_SPC] = 3,
 };
 
+/* SPM register data for 8226 */
+static const struct spm_reg_data spm_reg_8226_cpu  = {
+	.reg_offset = spm_reg_offset_v2_1,
+	.spm_cfg = 0x0,
+	.spm_dly = 0x3C102800,
+	.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
+		0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,
+		0x80, 0x10, 0x26, 0x30, 0x0F },
+	.start_index[PM_SLEEP_MODE_STBY] = 0,
+	.start_index[PM_SLEEP_MODE_SPC] = 5,
+};
+
 static const u8 spm_reg_offset_v1_1[SPM_REG_NR] = {
 	[SPM_REG_CFG]		= 0x08,
 	[SPM_REG_SPM_CTL]	= 0x20,
@@ -259,6 +271,8 @@  static struct spm_driver_data *spm_get_drv(struct platform_device *pdev,
 }
 
 static const struct of_device_id spm_match_table[] = {
+	{ .compatible = "qcom,msm8226-saw2-v2.1-cpu",
+	  .data = &spm_reg_8226_cpu },
 	{ .compatible = "qcom,msm8974-saw2-v2.1-cpu",
 	  .data = &spm_reg_8974_8084_cpu },
 	{ .compatible = "qcom,apq8084-saw2-v2.1-cpu",