From patchwork Wed Mar 9 05:19:30 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Hui X-Patchwork-Id: 460 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:42:48 -0000 Delivered-To: patches@linaro.org Received: by 10.224.60.68 with SMTP id o4cs48165qah; Tue, 8 Mar 2011 21:21:55 -0800 (PST) Received: by 10.101.139.15 with SMTP id r15mr2547568ann.137.1299648114685; Tue, 08 Mar 2011 21:21:54 -0800 (PST) Received: from mail-gy0-f178.google.com (mail-gy0-f178.google.com [209.85.160.178]) by mx.google.com with ESMTPS id c16si3594824anc.86.2011.03.08.21.21.54 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 Mar 2011 21:21:54 -0800 (PST) Received-SPF: neutral (google.com: 209.85.160.178 is neither permitted nor denied by best guess record for domain of jason.hui@linaro.org) client-ip=209.85.160.178; Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.160.178 is neither permitted nor denied by best guess record for domain of jason.hui@linaro.org) smtp.mail=jason.hui@linaro.org Received: by gyg8 with SMTP id 8so104791gyg.37 for ; Tue, 08 Mar 2011 21:21:54 -0800 (PST) Received: by 10.101.184.29 with SMTP id l29mr2539547anp.107.1299648114327; Tue, 08 Mar 2011 21:21:54 -0800 (PST) Received: from localhost.localdomain ([116.231.118.83]) by mx.google.com with ESMTPS id e4sm1953950and.18.2011.03.08.21.21.49 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 Mar 2011 21:21:54 -0800 (PST) From: Jason Liu To: devicetree-discuss@lists.ozlabs.org Cc: linaro-dev@lists.linaro.org, patches@linaro.org, grant.likely@linaro.org Subject: [PATCH V3 2/5] arm/dt: add very basic dts file for babbage board Date: Wed, 9 Mar 2011 13:19:30 +0800 Message-Id: <1299647973-21845-3-git-send-email-jason.hui@linaro.org> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1299647973-21845-1-git-send-email-jason.hui@linaro.org> References: <1299647973-21845-1-git-send-email-jason.hui@linaro.org> Signed-off-by: Jason Liu Singed-off-by: Rob Herring --- arch/arm/boot/dts/babbage.dts | 110 +++++++++++++++++++++++++++++++++++++++++ 1 files changed, 110 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/babbage.dts b/arch/arm/boot/dts/babbage.dts new file mode 100644 index 0000000..303dcd5 --- /dev/null +++ b/arch/arm/boot/dts/babbage.dts @@ -0,0 +1,110 @@ +/dts-v1/; + +/ { + model = "Freescale i.MX51 Babbage"; + compatible = "fsl,mx51-babbage"; + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <1>; + interrupt-parent = <&tzic>; + + memory { + reg = <0x90000000 0x20000000>; + }; + + chosen { + bootargs = "console=ttymxc0,115200n8 debug earlyprintk ip=dhcp"; + }; + + soc { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges; + + tzic: tz-interrupt-controller { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0xe0000000 0x1000>; + compatible = "fsl,imx51-tzic"; + }; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + uart0_clk: uart0 { + compatible = "clock"; + clock-outputs = "imx-uart.0"; + }; + + uart1_clk: uart1 { + compatible = "clock"; + clock-outputs = "imx-uart.1"; + }; + + uart2_clk: uart2 { + compatible = "clock"; + clock-outputs = "imx-uart.2"; + }; + + fec_clk: fec { + compatible = "clock"; + clock-outputs = "fec.0"; + }; + }; + + aips@73f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x73f00000 0x100000>; + + imx-uart@bc000 { + compatible = "fsl,imx51-uart"; + reg = <0xbc000 0x1000>; + interrupts = <0x1f>; + fsl,has-rts-cts; + uart-clock = <&uart0_clk>, "uart"; + }; + + imx-uart@c0000 { + compatible = "fsl,imx51-uart"; + reg = <0xc0000 0x1000>; + interrupts = <0x20>; + fsl,has-rts-cts; + uart-clock = <&uart1_clk>, "uart"; + }; + }; + + spba@70000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x70000000 0x100000>; + + imx-uart@c000 { + compatible = "fsl,imx51-uart"; + reg = <0xc000 0x1000>; + interrupts = <0x21>; + fsl,has-rts-cts; + uart-clock = <&uart2_clk>, "uart"; + }; + }; + + aips@83f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0x83f00000 0x100000>; + + fec@ec000 { + compatible = "fsl,imx-fec"; + reg = <0xec000 0x1000>; + interrupts = <0x57>; + fec_clk-clock = <&fec_clk>, "fec"; + }; + }; +};