| Message ID | 20210617054548.353293-5-bhupesh.sharma@linaro.org |
|---|---|
| State | Accepted |
| Commit | b557471bb286b5df7eda477041d58b12d4b44219 |
| Headers | show |
| Series | arm64: dts: qcom: Add SA8155p-adp board DTS | expand |
> Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc > nodes. > > Cc: Mark Brown <broonie@kernel.org> > Cc: Vinod Koul <vkoul@kernel.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > --- > arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++ > 1 file changed, 107 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > new file mode 100644 > index 000000000000..0c7d7a66c0b5 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > @@ -0,0 +1,107 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2021, Linaro Limited > + */ > + > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/spmi/spmi.h> > + > +/ { > + thermal-zones { > + pmm8155au-2-thermal { > + polling-delay-passive = <100>; > + polling-delay = <0>; > + > + thermal-sensors = <&pmm8155au_2_temp>; > + > + trips { > + trip0 { > + temperature = <95000>; > + hysteresis = <0>; > + type = "passive"; > + }; > + > + trip1 { > + temperature = <115000>; > + hysteresis = <0>; > + type = "hot"; > + }; > + > + trip2 { > + temperature = <145000>; > + hysteresis = <0>; > + type = "critical"; > + }; > + }; > + }; > + }; > +}; > + > +&spmi_bus { > + pmic@4 { > + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; > + reg = <0x4 SPMI_USID>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + power-on@800 { > + compatible = "qcom,pm8916-pon"; > + reg = <0x0800>; No common debounce, interrupts, bias- property or pwrkey key code? Besides, (as a question to Bjorn and others) do we pad reg to 4 digits in PMIC DTs now? > + > + status = "disabled"; > + }; > + > + pmm8155au_2_temp: temp-alarm@2400 { > + compatible = "qcom,spmi-temp-alarm"; > + reg = <0x2400>; > + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; > + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; > + io-channel-names = "thermal"; > + #thermal-sensor-cells = <0>; > + }; > + > + pmm8155au_2_adc: adc@3100 { > + compatible = "qcom,spmi-adc5"; > + reg = <0x3100>; > + #address-cells = <1>; > + #size-cells = <0>; > + #io-channel-cells = <1>; > + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; > + > + ref-gnd@0 { > + reg = <ADC5_REF_GND>; > + qcom,pre-scaling = <1 1>; > + label = "ref_gnd"; > + }; > + > + vref-1p25@1 { > + reg = <ADC5_1P25VREF>; > + qcom,pre-scaling = <1 1>; > + label = "vref_1p25"; > + }; > + > + die-temp@6 { > + reg = <ADC5_DIE_TEMP>; > + qcom,pre-scaling = <1 1>; > + label = "die_temp"; > + }; > + }; > + > + pmm8155au_2_gpios: gpio@c000 { > + compatible = "qcom,pmm8155au-gpio"; > + reg = <0xc000>; > + gpio-controller; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; Don't we do gpio-ranges anymore? > + }; > + > + pmic@5 { > + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; > + reg = <0x5 SPMI_USID>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > +}; Konrad
Hi Konrad, Thanks for your review. On Fri, 18 Jun 2021 at 04:02, Konrad Dybcio <konrad.dybcio@somainline.org> wrote: > > > > Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc > > nodes. > > > > Cc: Mark Brown <broonie@kernel.org> > > Cc: Vinod Koul <vkoul@kernel.org> > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++ > > 1 file changed, 107 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > > > diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > new file mode 100644 > > index 000000000000..0c7d7a66c0b5 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > @@ -0,0 +1,107 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2021, Linaro Limited > > + */ > > + > > +#include <dt-bindings/input/input.h> > > +#include <dt-bindings/interrupt-controller/irq.h> > > +#include <dt-bindings/spmi/spmi.h> > > + > > +/ { > > + thermal-zones { > > + pmm8155au-2-thermal { > > + polling-delay-passive = <100>; > > + polling-delay = <0>; > > + > > + thermal-sensors = <&pmm8155au_2_temp>; > > + > > + trips { > > + trip0 { > > + temperature = <95000>; > > + hysteresis = <0>; > > + type = "passive"; > > + }; > > + > > + trip1 { > > + temperature = <115000>; > > + hysteresis = <0>; > > + type = "hot"; > > + }; > > + > > + trip2 { > > + temperature = <145000>; > > + hysteresis = <0>; > > + type = "critical"; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&spmi_bus { > > + pmic@4 { > > + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; > > + reg = <0x4 SPMI_USID>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + power-on@800 { > > + compatible = "qcom,pm8916-pon"; > > + reg = <0x0800>; > > No common debounce, interrupts, bias- property or pwrkey key code? > > Besides, (as a question to Bjorn and others) do we pad reg to 4 digits in PMIC DTs now? Maybe Bjorn can pitch in with his thoughts here. > > + > > + status = "disabled"; > > + }; > > + > > + pmm8155au_2_temp: temp-alarm@2400 { > > + compatible = "qcom,spmi-temp-alarm"; > > + reg = <0x2400>; > > + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; > > + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; > > + io-channel-names = "thermal"; > > + #thermal-sensor-cells = <0>; > > + }; > > + > > + pmm8155au_2_adc: adc@3100 { > > + compatible = "qcom,spmi-adc5"; > > + reg = <0x3100>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + #io-channel-cells = <1>; > > + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; > > + > > + ref-gnd@0 { > > + reg = <ADC5_REF_GND>; > > + qcom,pre-scaling = <1 1>; > > + label = "ref_gnd"; > > + }; > > + > > + vref-1p25@1 { > > + reg = <ADC5_1P25VREF>; > > + qcom,pre-scaling = <1 1>; > > + label = "vref_1p25"; > > + }; > > + > > + die-temp@6 { > > + reg = <ADC5_DIE_TEMP>; > > + qcom,pre-scaling = <1 1>; > > + label = "die_temp"; > > + }; > > + }; > > + > > + pmm8155au_2_gpios: gpio@c000 { > > + compatible = "qcom,pmm8155au-gpio"; > > + reg = <0xc000>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > Don't we do gpio-ranges anymore? Maybe Bjorn can pitch in with his thoughts here as he may have more historical context, but I personally think that since the mapping between the pin controller local number space and the pins in the GPIO controller local number space is 1:1 (same) here, adding gpio-ranges property here is optional (as it provides little additional information). But I might have missed something here, so I will wait for more thoughts from Bjorn. Thanks, Bhupesh > > > > + }; > > + > > + pmic@5 { > > + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; > > + reg = <0x5 SPMI_USID>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > +}; > > > Konrad >
On Thu 17 Jun 17:32 CDT 2021, Konrad Dybcio wrote: > > > Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc > > nodes. > > > > Cc: Mark Brown <broonie@kernel.org> > > Cc: Vinod Koul <vkoul@kernel.org> > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++ > > 1 file changed, 107 insertions(+) > > create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > > > diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > new file mode 100644 > > index 000000000000..0c7d7a66c0b5 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi > > @@ -0,0 +1,107 @@ > > +// SPDX-License-Identifier: BSD-3-Clause > > +/* > > + * Copyright (c) 2021, Linaro Limited > > + */ > > + > > +#include <dt-bindings/input/input.h> > > +#include <dt-bindings/interrupt-controller/irq.h> > > +#include <dt-bindings/spmi/spmi.h> > > + > > +/ { > > + thermal-zones { > > + pmm8155au-2-thermal { > > + polling-delay-passive = <100>; > > + polling-delay = <0>; > > + > > + thermal-sensors = <&pmm8155au_2_temp>; > > + > > + trips { > > + trip0 { > > + temperature = <95000>; > > + hysteresis = <0>; > > + type = "passive"; > > + }; > > + > > + trip1 { > > + temperature = <115000>; > > + hysteresis = <0>; > > + type = "hot"; > > + }; > > + > > + trip2 { > > + temperature = <145000>; > > + hysteresis = <0>; > > + type = "critical"; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&spmi_bus { > > + pmic@4 { > > + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; > > + reg = <0x4 SPMI_USID>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + power-on@800 { > > + compatible = "qcom,pm8916-pon"; > > + reg = <0x0800>; > > No common debounce, interrupts, bias- property or pwrkey key code? > > Besides, (as a question to Bjorn and others) do we pad reg to 4 digits in PMIC DTs now? > We want the regs to be padded to the address width to make it easier for humans to sort the nodes. At least for me it's easy to compare a 3-digit address with a 4-digit one, so I haven't felt the need to enforce it here. But I certainly don't mind. > > > > + > > + status = "disabled"; > > + }; > > + > > + pmm8155au_2_temp: temp-alarm@2400 { > > + compatible = "qcom,spmi-temp-alarm"; > > + reg = <0x2400>; > > + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; > > + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; > > + io-channel-names = "thermal"; > > + #thermal-sensor-cells = <0>; > > + }; > > + > > + pmm8155au_2_adc: adc@3100 { > > + compatible = "qcom,spmi-adc5"; > > + reg = <0x3100>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + #io-channel-cells = <1>; > > + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; > > + > > + ref-gnd@0 { > > + reg = <ADC5_REF_GND>; > > + qcom,pre-scaling = <1 1>; > > + label = "ref_gnd"; > > + }; > > + > > + vref-1p25@1 { > > + reg = <ADC5_1P25VREF>; > > + qcom,pre-scaling = <1 1>; > > + label = "vref_1p25"; > > + }; > > + > > + die-temp@6 { > > + reg = <ADC5_DIE_TEMP>; > > + qcom,pre-scaling = <1 1>; > > + label = "die_temp"; > > + }; > > + }; > > + > > + pmm8155au_2_gpios: gpio@c000 { > > + compatible = "qcom,pmm8155au-gpio"; > > + reg = <0xc000>; > > + gpio-controller; > > + #gpio-cells = <2>; > > + interrupt-controller; > > + #interrupt-cells = <2>; > > + }; > > Don't we do gpio-ranges anymore? > Yes, that is required by the binding. I added that and picked up the 3 patches. Thanks for reviewing Konrad, and thanks for the patches Bhupesh. Regards, Bjorn > > > > + }; > > + > > + pmic@5 { > > + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; > > + reg = <0x5 SPMI_USID>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > +}; > > > Konrad >
diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi new file mode 100644 index 000000000000..0c7d7a66c0b5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +/ { + thermal-zones { + pmm8155au-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_2_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@4 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + + status = "disabled"; + }; + + pmm8155au_2_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_2_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = <ADC5_REF_GND>; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = <ADC5_1P25VREF>; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = <ADC5_DIE_TEMP>; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_2_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@5 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +};