diff mbox

[edk2,1/2] MdePkg: fix ARM version of InternalMathSwapBytes64 ()

Message ID 1427472286-20051-1-git-send-email-ard.biesheuvel@linaro.org
State New
Headers show

Commit Message

Ard Biesheuvel March 27, 2015, 4:04 p.m. UTC 
The ARM asm implementation of InternalMathSwapBytes64 () does
interesting things if bit 7 of operand r1 (upper 32 bits of the
input value) is set. After the recursive swap, bit 7 ends up in
the sign bit position, after which it is right shifted with sign
extension, and or'ed with the upper half of the output value.

This means SwapBytes64 (0x00000080_00000000) returns an incorrect
value of 0xFFFFFFFF_80000000.

Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 MdePkg/Library/BaseLib/Arm/Math64.S | 16 ++++------------
 1 file changed, 4 insertions(+), 12 deletions(-)

\ No newline at end of file
diff mbox

Patch

diff --git a/MdePkg/Library/BaseLib/Arm/Math64.S b/MdePkg/Library/BaseLib/Arm/Math64.S
index 4d975739207a..e2512621fe1a 100755
--- a/MdePkg/Library/BaseLib/Arm/Math64.S
+++ b/MdePkg/Library/BaseLib/Arm/Math64.S
@@ -256,22 +256,14 @@  L30:
 	GCC_ASM_EXPORT(InternalMathSwapBytes64)
 
 ASM_PFX(InternalMathSwapBytes64):
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, uses_anonymous_args = 0
-	stmfd	sp!, {r4, r5, r6, r7, lr}
-	add	r7, sp, #12
+	stmfd	sp!, {r4, r5, r7, lr}
 	mov	r5, r1
 	bl	ASM_PFX(SwapBytes32)
-	mov	r6, r0
+	mov	r4, r0
 	mov	r0, r5
 	bl	ASM_PFX(SwapBytes32)
-	mov	r4, r6
-	mov	r5, r4, asr #31
-	mov	r2, #0
-	mov	r1, r0, asr #31
-	orr	r0, r0, r2
-	orr	r1, r1, r4
-	ldmfd	sp!, {r4, r5, r6, r7, pc}
+	mov	r1, r4
+	ldmfd	sp!, {r4, r5, r7, pc}
 
 
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED