| Message ID | 20210625011355.3468586-12-ping.bai@nxp.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add imx8ulp basic dtsi support | expand |
> From: Jacky Bai <ping.bai@nxp.com> > Sent: Friday, June 25, 2021 9:14 AM > > Add the basic dts file for i.MX8ULP EVK board. > Only the necessary devices for minimal system boot up are enabled: > enet, emmc, usb, console uart. > > some of the devices' pin status may lost during low power mode, so additional > sleep pinctrl properties are included by default. > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com> Regards Aisheng
On Fri, Jun 25, 2021 at 09:13:55AM +0800, Jacky Bai wrote: > Add the basic dts file for i.MX8ULP EVK board. > Only the necessary devices for minimal system boot up are enabled: > enet, emmc, usb, console uart. > > some of the devices' pin status may lost during low power mode, > so additional sleep pinctrl properties are included by default. > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > --- > - v3 changes: > no > > - v2 changes: > add the memory node place holder > update the license > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 148 ++++++++++++++++++ > 2 files changed, 149 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 25806c4924cb..8c24a05d55af 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -65,5 +65,6 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb > > dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > new file mode 100644 > index 000000000000..de84f29c12ce > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > @@ -0,0 +1,148 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright 2021 NXP > + */ > + > +/dts-v1/; > + > +#include "imx8ulp.dtsi" > + > +/ { > + model = "NXP i.MX8ULP EVK"; > + compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp"; > + > + chosen { > + stdout-path = &lpuart5; > + }; > + > + memory@40000000 { Unit-address doesn't seem to match 'reg' property. Shawn > + device_type = "memory"; > + reg = <0x0 0x80000000 0 0x80000000>; > + }; > +}; > + > +&fec { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_enet>; > + phy-mode = "rmii"; > + phy-handle = <ðphy>; > + status = "okay"; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy: ethernet-phy { > + reg = <1>; > + micrel,led-mode = <1>; > + }; > + }; > +}; > + > +&lpuart5 { > + /* console */ > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&pinctrl_lpuart5>; > + pinctrl-1 = <&pinctrl_lpuart5>; > + status = "okay"; > +}; > + > +&usbotg1 { > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&pinctrl_otgid1>; > + pinctrl-1 = <&pinctrl_otgid1>; > + dr_mode = "otg"; > + hnp-disable; > + srp-disable; > + adp-disable; > + status = "okay"; > +}; > + > +&usbphy1 { > + status = "okay"; > +}; > + > +&usbmisc1 { > + status = "okay"; > +}; > + > +&usbotg2 { > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&pinctrl_otgid2>; > + pinctrl-1 = <&pinctrl_otgid2>; > + dr_mode = "otg"; > + hnp-disable; > + srp-disable; > + adp-disable; > + status = "okay"; > +}; > + > +&usbphy2 { > + status = "okay"; > +}; > + > +&usbmisc2 { > + status = "okay"; > +}; > + > +&usdhc0 { > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&pinctrl_usdhc0>; > + pinctrl-1 = <&pinctrl_usdhc0>; > + non-removable; > + bus-width = <4>; > + status = "okay"; > +}; > + > +&iomuxc1 { > + pinctrl_enet: enetgrp { > + fsl,pins = < > + MX8ULP_PAD_PTE15__ENET0_MDC 0x43 > + MX8ULP_PAD_PTE14__ENET0_MDIO 0x43 > + MX8ULP_PAD_PTE17__ENET0_RXER 0x43 > + MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43 > + MX8ULP_PAD_PTF1__ENET0_RXD0 0x43 > + MX8ULP_PAD_PTE20__ENET0_RXD1 0x43 > + MX8ULP_PAD_PTE16__ENET0_TXEN 0x43 > + MX8ULP_PAD_PTE23__ENET0_TXD0 0x43 > + MX8ULP_PAD_PTE22__ENET0_TXD1 0x43 > + MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43 > + MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43 > + >; > + }; > + > + pinctrl_lpuart5: lpuart5grp { > + fsl,pins = < > + MX8ULP_PAD_PTF14__LPUART5_TX 0x3 > + MX8ULP_PAD_PTF15__LPUART5_RX 0x3 > + >; > + }; > + > + pinctrl_otgid1: usb1grp { > + fsl,pins = < > + MX8ULP_PAD_PTF2__USB0_ID 0x10003 > + >; > + }; > + > + pinctrl_otgid2: usb2grp { > + fsl,pins = < > + MX8ULP_PAD_PTD23__USB1_ID 0x10003 > + >; > + }; > + > + pinctrl_usdhc0: usdhc0grp { > + fsl,pins = < > + MX8ULP_PAD_PTD1__SDHC0_CMD 0x43 > + MX8ULP_PAD_PTD2__SDHC0_CLK 0x10042 > + MX8ULP_PAD_PTD10__SDHC0_D0 0x43 > + MX8ULP_PAD_PTD9__SDHC0_D1 0x43 > + MX8ULP_PAD_PTD8__SDHC0_D2 0x43 > + MX8ULP_PAD_PTD7__SDHC0_D3 0x43 > + MX8ULP_PAD_PTD6__SDHC0_D4 0x43 > + MX8ULP_PAD_PTD5__SDHC0_D5 0x43 > + MX8ULP_PAD_PTD4__SDHC0_D6 0x43 > + MX8ULP_PAD_PTD3__SDHC0_D7 0x43 > + MX8ULP_PAD_PTD11__SDHC0_DQS 0x10042 > + >; > + }; > +}; > -- > 2.26.2 >
> Subject: Re: [PATCH v3 11/11] arm64: dts: imx8ulp: Add the basic dts for > imx8ulp evk board > > On Fri, Jun 25, 2021 at 09:13:55AM +0800, Jacky Bai wrote: > > Add the basic dts file for i.MX8ULP EVK board. > > Only the necessary devices for minimal system boot up are enabled: > > enet, emmc, usb, console uart. > > > > some of the devices' pin status may lost during low power mode, so > > additional sleep pinctrl properties are included by default. > > > > Signed-off-by: Jacky Bai <ping.bai@nxp.com> > > --- > > - v3 changes: > > no > > > > - v2 changes: > > add the memory node place holder > > update the license > > --- > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 148 > > ++++++++++++++++++ > > 2 files changed, 149 insertions(+) > > create mode 100644 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile > > b/arch/arm64/boot/dts/freescale/Makefile > > index 25806c4924cb..8c24a05d55af 100644 > > --- a/arch/arm64/boot/dts/freescale/Makefile > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > @@ -65,5 +65,6 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb > > +dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb > > > > dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb diff --git > > a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > > b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > > new file mode 100644 > > index 000000000000..de84f29c12ce > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts > > @@ -0,0 +1,148 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > +/* > > + * Copyright 2021 NXP > > + */ > > + > > +/dts-v1/; > > + > > +#include "imx8ulp.dtsi" > > + > > +/ { > > + model = "NXP i.MX8ULP EVK"; > > + compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp"; > > + > > + chosen { > > + stdout-path = &lpuart5; > > + }; > > + > > + memory@40000000 { > > Unit-address doesn't seem to match 'reg' property. > Sorry, my fault, will fix it now in V4. BR Jacky Bai > Shawn > > > + device_type = "memory"; > > + reg = <0x0 0x80000000 0 0x80000000>; > > + }; > > +}; > > + > > +&fec { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_enet>; > > + phy-mode = "rmii"; > > + phy-handle = <ðphy>; > > + status = "okay"; > > + > > + mdio { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + ethphy: ethernet-phy { > > + reg = <1>; > > + micrel,led-mode = <1>; > > + }; > > + }; > > +}; > > + > > +&lpuart5 { > > + /* console */ > > + pinctrl-names = "default", "sleep"; > > + pinctrl-0 = <&pinctrl_lpuart5>; > > + pinctrl-1 = <&pinctrl_lpuart5>; > > + status = "okay"; > > +}; > > + > > +&usbotg1 { > > + pinctrl-names = "default", "sleep"; > > + pinctrl-0 = <&pinctrl_otgid1>; > > + pinctrl-1 = <&pinctrl_otgid1>; > > + dr_mode = "otg"; > > + hnp-disable; > > + srp-disable; > > + adp-disable; > > + status = "okay"; > > +}; > > + > > +&usbphy1 { > > + status = "okay"; > > +}; > > + > > +&usbmisc1 { > > + status = "okay"; > > +}; > > + > > +&usbotg2 { > > + pinctrl-names = "default", "sleep"; > > + pinctrl-0 = <&pinctrl_otgid2>; > > + pinctrl-1 = <&pinctrl_otgid2>; > > + dr_mode = "otg"; > > + hnp-disable; > > + srp-disable; > > + adp-disable; > > + status = "okay"; > > +}; > > + > > +&usbphy2 { > > + status = "okay"; > > +}; > > + > > +&usbmisc2 { > > + status = "okay"; > > +}; > > + > > +&usdhc0 { > > + pinctrl-names = "default", "sleep"; > > + pinctrl-0 = <&pinctrl_usdhc0>; > > + pinctrl-1 = <&pinctrl_usdhc0>; > > + non-removable; > > + bus-width = <4>; > > + status = "okay"; > > +}; > > + > > +&iomuxc1 { > > + pinctrl_enet: enetgrp { > > + fsl,pins = < > > + MX8ULP_PAD_PTE15__ENET0_MDC 0x43 > > + MX8ULP_PAD_PTE14__ENET0_MDIO 0x43 > > + MX8ULP_PAD_PTE17__ENET0_RXER 0x43 > > + MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43 > > + MX8ULP_PAD_PTF1__ENET0_RXD0 0x43 > > + MX8ULP_PAD_PTE20__ENET0_RXD1 0x43 > > + MX8ULP_PAD_PTE16__ENET0_TXEN 0x43 > > + MX8ULP_PAD_PTE23__ENET0_TXD0 0x43 > > + MX8ULP_PAD_PTE22__ENET0_TXD1 0x43 > > + MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43 > > + MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43 > > + >; > > + }; > > + > > + pinctrl_lpuart5: lpuart5grp { > > + fsl,pins = < > > + MX8ULP_PAD_PTF14__LPUART5_TX 0x3 > > + MX8ULP_PAD_PTF15__LPUART5_RX 0x3 > > + >; > > + }; > > + > > + pinctrl_otgid1: usb1grp { > > + fsl,pins = < > > + MX8ULP_PAD_PTF2__USB0_ID 0x10003 > > + >; > > + }; > > + > > + pinctrl_otgid2: usb2grp { > > + fsl,pins = < > > + MX8ULP_PAD_PTD23__USB1_ID 0x10003 > > + >; > > + }; > > + > > + pinctrl_usdhc0: usdhc0grp { > > + fsl,pins = < > > + MX8ULP_PAD_PTD1__SDHC0_CMD 0x43 > > + MX8ULP_PAD_PTD2__SDHC0_CLK 0x10042 > > + MX8ULP_PAD_PTD10__SDHC0_D0 0x43 > > + MX8ULP_PAD_PTD9__SDHC0_D1 0x43 > > + MX8ULP_PAD_PTD8__SDHC0_D2 0x43 > > + MX8ULP_PAD_PTD7__SDHC0_D3 0x43 > > + MX8ULP_PAD_PTD6__SDHC0_D4 0x43 > > + MX8ULP_PAD_PTD5__SDHC0_D5 0x43 > > + MX8ULP_PAD_PTD4__SDHC0_D6 0x43 > > + MX8ULP_PAD_PTD3__SDHC0_D7 0x43 > > + MX8ULP_PAD_PTD11__SDHC0_DQS 0x10042 > > + >; > > + }; > > +}; > > -- > > 2.26.2 > >
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 25806c4924cb..8c24a05d55af 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -65,5 +65,6 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_S32) += s32v234-evb.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts new file mode 100644 index 000000000000..de84f29c12ce --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2021 NXP + */ + +/dts-v1/; + +#include "imx8ulp.dtsi" + +/ { + model = "NXP i.MX8ULP EVK"; + compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp"; + + chosen { + stdout-path = &lpuart5; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0 0x80000000>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rmii"; + phy-handle = <ðphy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy { + reg = <1>; + micrel,led-mode = <1>; + }; + }; +}; + +&lpuart5 { + /* console */ + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_lpuart5>; + pinctrl-1 = <&pinctrl_lpuart5>; + status = "okay"; +}; + +&usbotg1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_otgid1>; + pinctrl-1 = <&pinctrl_otgid1>; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + status = "okay"; +}; + +&usbphy1 { + status = "okay"; +}; + +&usbmisc1 { + status = "okay"; +}; + +&usbotg2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_otgid2>; + pinctrl-1 = <&pinctrl_otgid2>; + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + status = "okay"; +}; + +&usbphy2 { + status = "okay"; +}; + +&usbmisc2 { + status = "okay"; +}; + +&usdhc0 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_usdhc0>; + pinctrl-1 = <&pinctrl_usdhc0>; + non-removable; + bus-width = <4>; + status = "okay"; +}; + +&iomuxc1 { + pinctrl_enet: enetgrp { + fsl,pins = < + MX8ULP_PAD_PTE15__ENET0_MDC 0x43 + MX8ULP_PAD_PTE14__ENET0_MDIO 0x43 + MX8ULP_PAD_PTE17__ENET0_RXER 0x43 + MX8ULP_PAD_PTE18__ENET0_CRS_DV 0x43 + MX8ULP_PAD_PTF1__ENET0_RXD0 0x43 + MX8ULP_PAD_PTE20__ENET0_RXD1 0x43 + MX8ULP_PAD_PTE16__ENET0_TXEN 0x43 + MX8ULP_PAD_PTE23__ENET0_TXD0 0x43 + MX8ULP_PAD_PTE22__ENET0_TXD1 0x43 + MX8ULP_PAD_PTE19__ENET0_REFCLK 0x43 + MX8ULP_PAD_PTF10__ENET0_1588_CLKIN 0x43 + >; + }; + + pinctrl_lpuart5: lpuart5grp { + fsl,pins = < + MX8ULP_PAD_PTF14__LPUART5_TX 0x3 + MX8ULP_PAD_PTF15__LPUART5_RX 0x3 + >; + }; + + pinctrl_otgid1: usb1grp { + fsl,pins = < + MX8ULP_PAD_PTF2__USB0_ID 0x10003 + >; + }; + + pinctrl_otgid2: usb2grp { + fsl,pins = < + MX8ULP_PAD_PTD23__USB1_ID 0x10003 + >; + }; + + pinctrl_usdhc0: usdhc0grp { + fsl,pins = < + MX8ULP_PAD_PTD1__SDHC0_CMD 0x43 + MX8ULP_PAD_PTD2__SDHC0_CLK 0x10042 + MX8ULP_PAD_PTD10__SDHC0_D0 0x43 + MX8ULP_PAD_PTD9__SDHC0_D1 0x43 + MX8ULP_PAD_PTD8__SDHC0_D2 0x43 + MX8ULP_PAD_PTD7__SDHC0_D3 0x43 + MX8ULP_PAD_PTD6__SDHC0_D4 0x43 + MX8ULP_PAD_PTD5__SDHC0_D5 0x43 + MX8ULP_PAD_PTD4__SDHC0_D6 0x43 + MX8ULP_PAD_PTD3__SDHC0_D7 0x43 + MX8ULP_PAD_PTD11__SDHC0_DQS 0x10042 + >; + }; +};
Add the basic dts file for i.MX8ULP EVK board. Only the necessary devices for minimal system boot up are enabled: enet, emmc, usb, console uart. some of the devices' pin status may lost during low power mode, so additional sleep pinctrl properties are included by default. Signed-off-by: Jacky Bai <ping.bai@nxp.com> --- - v3 changes: no - v2 changes: add the memory node place holder update the license --- arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/imx8ulp-evk.dts | 148 ++++++++++++++++++ 2 files changed, 149 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8ulp-evk.dts