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[209.132.180.67]) by mx.google.com with ESMTP id su3si1747894pbc.53.2015.05.07.00.56.58; Thu, 07 May 2015 00:57:00 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752090AbbEGH45 (ORCPT + 6 others); Thu, 7 May 2015 03:56:57 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:36373 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752036AbbEGH44 (ORCPT ); Thu, 7 May 2015 03:56:56 -0400 Received: by pabsx10 with SMTP id sx10so33307456pab.3 for ; Thu, 07 May 2015 00:56:55 -0700 (PDT) X-Received: by 10.68.136.134 with SMTP id qa6mr4862427pbb.66.1430985415820; Thu, 07 May 2015 00:56:55 -0700 (PDT) Received: from localhost.localdomain ([104.207.83.5]) by mx.google.com with ESMTPSA id l5sm1249389pbq.15.2015.05.07.00.56.52 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 07 May 2015 00:56:54 -0700 (PDT) From: Zhangfei Gao To: Jaehoon Chung , ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, Zhangfei Gao Subject: [PATCH v2 1/3] Document: dw_mmc-k3: add document of hi6220 mmc Date: Thu, 7 May 2015 15:56:39 +0800 Message-Id: <1430985401-12202-2-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430985401-12202-1-git-send-email-zhangfei.gao@linaro.org> References: <1430985401-12202-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhangfei.gao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add bindings for hi6220 mmc support Signed-off-by: Zhangfei Gao --- .../devicetree/bindings/mmc/k3-dw-mshc.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt index 3b35449..df37058 100644 --- a/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt +++ b/Documentation/devicetree/bindings/mmc/k3-dw-mshc.txt @@ -13,6 +13,10 @@ Required Properties: * compatible: should be one of the following. - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. + - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. + +Optional Properties: +- hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. Example: @@ -42,3 +46,27 @@ Example: cap-mmc-highspeed; cap-sd-highspeed; }; + + /* for Hi6220 */ + + dwmmc_1: dwmmc1@f723e000 { + compatible = "hisilicon,hi6220-dw-mshc"; + num-slots = <0x1>; + bus-width = <0x4>; + disable-wp; + cap-sd-highspeed; + sd-uhs-sdr12; + sd-uhs-sdr25; + card-detect-delay = <200>; + hisilicon,peripheral-syscon = <&ao_ctrl>; + reg = <0x0 0xf723e000 0x0 0x1000>; + interrupts = <0x0 0x49 0x4>; + clocks = <&clock_sys HI6220_MMC1_CIUCLK>, <&clock_sys HI6220_MMC1_CLK>; + clock-names = "ciu", "biu"; + cd-gpios = <&gpio1 0 1>; + pinctrl-names = "default", "idle"; + pinctrl-0 = <&sd_pmx_func &sd_clk_cfg_func &sd_cfg_func>; + pinctrl-1 = <&sd_pmx_idle &sd_clk_cfg_idle &sd_cfg_idle>; + vqmmc-supply = <&ldo7>; + vmmc-supply = <&ldo10>; + };